• 전력전자학회논문지
• /
• 제10권6호
• /
• pp.543-549
• /
• 2005

본 논문에서는 캐리어(Carrier)를 이용한 매트릭스 컨버터(Matrix Converter)의 전압 변조 방법을 제안한다. 출력상전압에 적절한 옵셋(Offset) 전압을 더하고, 캐리어 파형의 기울기를 적절히 제어함으로써 입력 전류를 역율 1의 정현파로 제어하면서 동시에 출력 전압의 합성이 가능하다. 이 방법은 기존의 매트릭스 컨버터 전압 변조 방법인 SVPWM과 동일한 스위칭 패턴을 나타내지만, 그 구현은 훨씬 간단한다. 또한 기존의 전압형 인버터(Voltage Source Inverter, VSI)에서 발전된 2상/3상 변조, 과변조(Over Modulation) 등의 개념을 유사하게 적용할 수 있어 그 활용도가 매우 논다. Matlab/Simulink를 이용한 시뮬레이션 결과와 실험을 통해 제안된 방법의 타당성을 검증하였다.

• 전기전자학회논문지
• /
• 제23권2호
• /
• pp.622-627
• /
• 2019

본 논문에서는 비대칭 공극을 갖는 단상 영구자석 동기 전동기의 센서리스 운전을 위한 초기 회전자 위치 검출 알고리즘을 제안한다. 일반적인 센서리스 운전 기법 중 역기전력 기반의 센서리스 제어는 영속 및 저속운전에서 역기전력 정보를 추정하기 어렵다. 이를 위해 오픈 루프 기동 기법이 필수적으로 요구되고 일정한 방향으로의 회전을 위해서는 회전자의 초기 위치 검출이 반드시 필요하다. 본 논문에서는 단상 영구자석 동기 전동기의 자기적 특성을 이용하여 고주파 전압 주입 신호에 옵셋 전압을 추가하여 회전자 자극을 검출하는 기법을 제안한다. 다수의 실험 결과를 통하여 제안된 알고리즘의 유효성과 유용성을 검증하였다.

• 전력전자학회:학술대회논문집
• /
• 전력전자학회 2018년도 추계학술대회
• /
• pp.104-106
• /
• 2018

The harmonics and the DC offset in the grid can cause serious synchronization problems for grid connected inverters (GCIs) which leads not able to satisfy the IEEE 519 and p1547 standards in terms of phase and frequency variations. In order to guarantee the smooth and reliable synchronization of GCIs with the grid, Phase Locked Loop (PLL) is the crucial element. Typically, the performance of the PLL is assessed to limit the grid disturbances e.g. grid harmonics, DC Offset and voltage sag etc. To ensure the quality of GCI, the PLL should be precise in estimating the grid amplitude, frequency and phase. Therefore, in this paper a novel Robust PLL technique called Digital Lock-in Amplifier (DLA) PLL is proposed. The proposed PLL estimate the frequency variations and phase errors accurately even in the highly distorted grid voltage conditions like grid voltage harmonics, DC offsets and grid voltage sag. To verify the performance of proposed method, it is compared with other six conventional used PLLs (CCF PLL, SOGI PLL, SOGI LPF PLL, APF PLL, dqDSC PLL, MAF PLL). The comparison is done by simulations on MATLAB Simulink. Finally, the experimental results are verified with Single Phase GCI Prototype.

• 제어로봇시스템학회논문지
• /
• 제20권9호
• /
• pp.914-921
• /
• 2014

In this paper, an algorithm is suggested to detect an offset angle of the absolute rotor position sensor after the initial assembly of a PMSG. Unlike previous studies in a stationary state, this one is not designed to detect an electrical angle but rather the absolute position of the rotor is detected while operating the generator. Also,a position sensor, current sensors and voltage sensor were used to ensure reliability. This technique completes the detection of the sensor offset in two steps. In the first step, a zero-crossing of the EMF is measured using a voltage sensor to detect the electrical angle offset when the alternator is actuated by the engine. In the second step, a high frequency current is injected along the d-axis on-line during the control of the generation, eventually to obtain the inductance using a DFT (Discrete Fourier Transform), and then to ultimately extract the final electrical angle offset through the comparison of the inductance magnitude. The suggested algorithm was validated with PSIM simulation and, furthermore, was tested with actual experiments on a dynamometer.

• 전력전자학회:학술대회논문집
• /
• 전력전자학회 1996년도 창립기념 전력전자학술발표회 논문집
• /
• pp.26-30
• /
• 1996

This paper proposes a novel method to reduce the torque ripple due to the non-ideality of the current sensing parts in vector-controlled inverter-fed PMSM(Permanent Magnet Synchronous Motor) drive systems. The motor output torque equations are derived in terms of their offset voltages and different voltage transducing gains. And the effects of phase current errors on motor torque are analyzed for both salient PMSM and non-salient PMSM. The proposed method can eliminate the torque ripple by nulling the offset voltages and setting the voltage transducing gains to the same value. To verify the proposed method, digital simulations are carried out for non-salient PMSM.

• 한국전기전자재료학회논문지
• /
• 제13권2호
• /
• pp.101-105
• /
• 2000

The effects of electrical on n-channel offset gated poly-Si TFT's have been investigated. It is observed that the electrical field near the drain region in offset devices is smaller than that of conventional device by simulation results. The variation rate of threshold voltage and subthreshold slope decrease with increasing the offset length because of lowering the electric field near the drain region. The offset gated poly-Si TFT's have been probed effective in reducing the degradation rate of device performance under electrical stressing.

• Journal of Electrical Engineering and Technology
• /
• 제12권4호
• /
• pp.1471-1483
• /
• 2017

The low-frequency characteristics of four-switch three-phase (FSTP) inverter are investigated in this paper. Firstly, a general space vector pulse width modulation (SVPWM) directly involved the neutral point voltage of DC-link is proposed, where no sector identifications and trigonometric function calculations are needed. Subsequently, to suppress the DC offset in the neutral point voltage, the relationship between the neutral point voltage and the ${\beta}-axis$ component of the load current is derived, and then a new neutral point voltage control scheme is proposed where no low pass filter is adopted. Finally, the relationship between the load power factor and the maximum linear modulation index of the FSTP inverter is revealed. Since the operational region for the FSTP inverter in low frequency is reduced by the enlarged amplitude of the neutral point voltage, a linear modulation range enlargement scheme is proposed. A permanent magnet synchronous motor with preset rotary speed serves as the low-frequency load of the FSTP inverter. Experimental results verify that the new neutral point voltage control scheme is effective in the deviation suppression of the neutral point voltage, and the proposed scheme is able to provide a larger linear operational region in low frequency.

• Journal of Power Electronics
• /
• 제16권1호
• /
• pp.310-318
• /
• 2016

This paper presents a new orthogonal signals generator (OSG) with DC Offset rejection for implementing a phase locked loop (PLL) in single-phase grid-connected power systems. An adaptive filter (AF) based on the least mean square (LMS) algorithm is used to constitute the OSG in this study. The DC offset in the measured grid voltage signal can be significantly rejected in the developed OSG technique. This generates two pure orthogonal signals that are free from the DC offset. As a result, the DC offset rejection performance of the presented single-phase phase locked loop (SPLL) can be enhanced. A mathematical model of the developed OSG and the principle of the adaptive filter based SPLL (AF-SPLL) are presented in detail. Finally, simulation and experimental results demonstrate the feasibility of the proposed AF-SPLL.

• 센서학회지
• /
• 제19권3호
• /
• pp.230-237
• /
• 2010

In sensor signal conditioning and processing, offset and drift characteristics of an operational amplifier are an important factor when the amplifier is used for a precise sensor signal amplifier. In order to use it in high accuracy, an expensive trimming or a complex compensation circuit is required. This paper presents the improved sensor signal conditioning and processing device for ubiquitous sensor network(USN) application or general purpose by developing a hardware of the circuit for reducing the offset voltage and drift characteristics, and a software for its control and sensor signal processing. We realize better offset voltage and drift characteristics of the signal conditioning circuit using low cost operational amplifiers. The experimental results show that this technique is effective in improving the performance of the sensor signal processing device.

• 전기학회논문지P
• /
• 제62권1호
• /
• pp.12-17
• /
• 2013

Fault currents are expressed as a combination of harmonic components and exponentially decaying DC offset components, during the occurrence of fault in power system. The DC offset components are included, when the voltage phase angle of fault inception is closer to $0^{\circ}$ or $180^{\circ}$. The digital protection relay should be detected quickly and accurately during the faults, despite of the distortions of relaying signal by these components. It is very important to implement the robust protection algorithm, that is not affected by DC offset and harmonic components, because most relaying algorithms extract the fundamental frequency component from distorted relaying signal. So, In order to high performance in relaying, advanced DC offset removal filter is required. In this paper, a new DC offset removal filter, which is no need to preset a time constant of power system and accurately estimate the DC offset components with one cycle of data, is proposed, and compared with the other filter. In order to verify performance of the filter, we used collecting the current signals after synchronous machine modeling by ATPDraw5.7p4 software. The results of simulation, the proposed DC offset removal filter do not need any prior information, the phase delay and gain error were not occurred.