• The Transactions of The Korean Institute of Electrical Engineers
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• v.64 no.7
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• pp.1005-1011
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• 2015

This paper proposes the DC offset compensation algorithm with fast response to the sensed grid voltage in the single-phase grid connected inverter. If the sensor of the grid voltage has problems, the DC offset of the grid voltage can be generated. This error must be resolved because the DC offset can generate the estimated grid frequency error of the phase-locked loop (PLL). In conventional algorithm to compensate the DC offset, the DC offset is estimated by integrating the synchronous reference frame d-axis voltage during one period of the grid voltage. The conventional algorithm has a drawback that is a slow dynamic response because monitoring the one period of the grid voltage is required. the proposed algorithm has fast dynamic response because the DC offset is consecutively estimated by transforming the d-axis voltage to synchronous reference frame without monitoring one cycle time of the grid voltage. The proposed algorithm is verified from PSIM simulation and the experiment.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.64 no.2
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• pp.67-73
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• 2015

Distance relay is widely used for the protection of long transmission line. Most of distance relay used to calculate line impedance by measuring voltage and current using DFT. So if there is a computation error due to the influence of phasor by DC offset component, due to excessive vibration by measuring line impedance, overreach or underreach can be occurs, and then abnormal and non-operation of distance relay can be issue. It is very important to implement the robust distance relaying that is not affected by DC offset component. This paper describes an enhanced distance relaying based on the DC offset elimination filter to minimize the effects of DC offset on a long transmission line. The proposed DC offset elimination filter has not need any prior information. The phase angle delay of the proposed DC offset filter did not occurred and the gain error was not found. The enhanced distance relay uses fault current as well as residual current. The behavior of the proposed distance relaying using off-line simulation has been verified using data about several fault conditions generated by the ATP simulation software.

• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.3
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• pp.201-208
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• 2015

The effects of dead-time and offset error, which cause output current distortion in single-phase grid-connected inverters are investigated this paper. Offset error is typically generated by measuring phase current, including the voltage unbalance of analog devices and non-ideal characteristics in current measurement paths. Dead-time inevitably occurs during generation of the gate signal for controlling power semiconductor switches. Hence, the performance of the grid-connected inverter is significantly degraded because of the current ripples. The current and voltage, including ripple components on the synchronous reference frame and stationary reference frame, are analyzed in detail. An algorithm, which has the proportional resonant controller, is also proposed to reduce current ripple components in the synchronous PI current regulator. As a result, computational complexity of the proposed algorithm is greatly simplified, and the magnitude of the current ripples is significantly decreased. The simulation and experimental results are presented to verify the usefulness of the proposed current ripple reduction algorithm.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.38A no.6
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• pp.512-519
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• 2013

In this paper, we propose a novel unambiguous correlation function for composite binary offset carrier (CBOC) signal tracking. First, we observe that a sub-carrier of CBOC signal is seen as a sum of four partial sub-carriers, and generate four partial-correlations composing the CBOC autocorrelation. Then, we obtain an unambiguous correlation function with a sharp main-peak by re-combining the partial correlations. From numerical results, we confirm that the proposed unambiguous correlation function offers a better tracking performance than the conventional correlation functions in terms of the tracking error standard deviation and multipath error envelope.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.30 no.1
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• pp.28-37
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• 2016

Fault locating is an important element to minimize the damage of power system. The computation error of fault locator may occur by the influence of the DC offset component during phasor extraction. In order to minimize the bad effects of DC offset component, this paper presents an improved fault location algorithm based on a DC offset removal filter for short fault in a double circuit transmission line. We have modeled a 154kV double circuit transmission line by the ATP software to demonstrate the effectiveness of the proposed fault locating algorithm. The line to line short faults were simulated and then collected simulation data was used. It can be seen that the error rate of fault locating estimation by the proposed algorithm decreases than the error rate of fault locating estimation by conventional algorithm.

• Journal of Advanced Navigation Technology
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• v.8 no.2
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• pp.163-168
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• 2004

In this paper, we propose a frequency synchronization algorithm using characteristic of CAZAC sequence for HDR-WPAN and analyze the performance by signal constellation and EVM(error vector magnitude). The proposed frequency offset technique estimated each sample phase error of two sequences among 12 CAZAC sequences which have excellent autocorrelated characteristic. Estimated phase error is multiplied to each sample of next sequence for compensating the frequency offset. The remaining frequency offset after compensating it with two sequences has maximum 0.002 offsest ranges at each sample. The computer simulation proved that the permission of EVM value had satisfied in the case of DQPSK at 20[dB].

• The Bulletin of The Korean Astronomical Society
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• v.37 no.2
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• pp.157.2-157.2
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• 2012

Direct-conversion receivers often suffer from a DC-offset that is a by-product of the direct conversion process to baseband. In general, a basic approach to reduce the DC-offset is to do simple average of the baseband signal and remove the DC by subtracting the average. However, this gives rise to a residual DC offset which degrades the performance when the receiver adopts the coding schemes with high coding rates such as 8-PSK. Therefore, more advanced methods should be additionally required for better performance. While the training sequences are basically designed to have good auto-correlation properties to facilitate the channel estimation, they may be not good for the simultaneous estimation of the channel response and the DC-offset. Also the DC offset compensation under a bad condition does not give good results due to the estimation error. Correspondingly, the proposed scheme employs the two important points. First, the training sequence codes are divided into two groups by MSE(Mean Squared Errors) for estimating the channel taps and then SNR calculated from each group is compared to predefined threshold to do fine DC-offset estimation. Next, ON/OFF module is applied for preventing performance degradation by large estimation error under severe channel conditions. The simulation results of the proposed scheme shows good performances compared to the existing algorithm. As a result, this scheme is surely applicable to the receiver design in many communications systems.

• Journal of Power Electronics
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• v.14 no.1
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• pp.82-91
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• 2014

This paper proposes a compensation algorithm for the analog rotor position errors caused by nonideal sinusoidal encoder output signals including offset and gain errors. In order to achieve a much higher resolution, position sensors such as resolvers or incremental encoders can be replaced by sinusoidal encoders. In practice, however, the periodic ripples related to the analog rotor position are generated by the offset and gain errors between the sine and cosine output signals of sinusoidal encoders. In this paper, the effects of offset and gain errors are easily analyzed by applying the concept of a rotating coordinate system based on the dq transformation method. The synchronous d-axis signal component is used directly to detect the amplitude of the offset and gain errors for the proposed compensator. As a result, the offset and gain errors can be well corrected by three integrators located on the synchronous d-axis component. In addition, the proposed algorithm does not require any additional hardware and can be easily implemented by a simple integral operation. The effectiveness of the proposed algorithm is verified through several experimental results.

• Journal of Broadcast Engineering
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• v.16 no.1
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• pp.85-95
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• 2011

In this paper, we propose an alternative carrier phase independent timing recovery method for VSB receivers. The Gardner algorithm may not estimate a timing offset in VSB systems when the residual carrier phase offset is contained in the signal. We use the conjugate multiplication of received signals for cancelling out the carrier phase offset. Then Gardner algorithm is employed for extracting the spectral line. The proposed method generates a consistent timing error even in the presence of the carrier phase offset.

• Journal of the Korean Society for Precision Engineering
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• v.27 no.9
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• pp.16-19
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• 2010

This paper presents how to design and fabricate the gravure offset printing system for enhancement of register precision. Factors of precision error are caused by imprecision of gravure plate, deformation of substrate, printing quality change due to the change of ink viscosity, Imprecision of printing machine, and so on. This study suggests concept design of gravure offset printing system which is able to minimize or remove these error factors.