• Journal of Institute of Control, Robotics and Systems
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• v.5 no.4
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• pp.471-480
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• 1999

This paper presents design and performance improvement of a new digital tomosynthesis (DTS) system for object-detector synchronous rotation. Firstly, a new DTS system, called OSDR (Object-Detector Synchronous Rotation) is suggested and designed to acquire X-ray digital images. Secondly, the shape distortion of DTS images generated by an image intensifier is modeled. And a new synthesis algorithm, which overcomes the limitations of the existing synthesis algorithm, is suggested to improve the sharpness of the synthesized image. Also an artifact analysis of the DTS system is performed. Thirdly, some performance indices, which evaluate quantitatively performance improvement, are defined. And the experimental verification of the performance improvement is accomplished by the ODSR system newly designed. The advantages of the ODSR system are expressed quantitatively, compared with an existing system.

• Journal of the Institute of Convergence Signal Processing
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• v.12 no.4
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• pp.309-314
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• 2011

As a system becomes more complex, a design relies more heavily on a methodology based on high-level abstraction and functional verification. SystemVerilog includes characteristics of hardware design language and verification language in the form of extensions to the Verilog HDL. However, the OOP of System Veri log does not allow multiple inheritance. In this paper, we propose adoption of SystemC to introduce multiple inheritance. After being created, a SystemC unit is combined with a SystemVerilog-based verification environment using SystemVerilog DPI and ModelSim macro. Employing multiple inheritance of SystemC makes a design of a verification environment simple and easy through source code reuse. Moreover, a verification environment including SysemC unit has a benefit of reconfigurability due to OOP.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.17 no.4
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• pp.129-137
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• 2016

BIM libraries for architectural projects have been developed and distributed. However, they do not define physical and logical quality control methods for individual library objects, so there are some difficulties in securing reliability of 3D library models converted from 2D drawings. Because the BIM library contents can be built by participating material and member-fabrication companies, after making individual BIM library objects, a certification process through separate quality verification is very important when delivering as-built BIM libraries. Since the BIM library should have generality for usage, it is necessary to secure the quality of BIM library objects according to consistent verification standards. Therefore, this study suggests a quality verification method for certifying a BIM library object from physical and data perspectives by comparing existing 2D drawings in the BIM libraries built based on standardized 2D drawings from MOLIT. This method could be widely used for quality verification in delivering BIM libraries by companies in the construction sector and operated with rule set data for quality verification of as-built BIM models.

• Journal of the Korean Society of Systems Engineering
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• v.9 no.1
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• pp.47-53
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• 2013

The object of this study is to define systematically for outputs of Verification Process among the system life cycle process based on ISO/IEC 15288 for power supply system, which is one of the importance sub-systems to configure the LRT system. Furthermore, to prevent various problem in advance that can occur in the Transition LRT's power supply to be completed Integration. For this purpose, traceability of verification requirement and outputs. should be managed to use verification for system requirement and data processing tool. by system engineering techniques of system life cycle process based on ISO/IEC 15288 to LRT system.

• Journal of the Korea Society for Simulation
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• v.20 no.4
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• pp.41-48
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• 2011

The act of writing a unit test is more an act of design than of verification. It is also more an act of documentation than of verification. The act of writing a unit test closes a remarkable number of feedback loops, the least of which is the one pertaining to verification of function. Unit testing is a fundamental practice in Extreme Programming, but most non-trivial code is difficult to test in isolation. Normal unit testing is hard because It is trying to test the code from outside. On the other hand, developing unit tests with Mock Objects leads to stronger tests and to better structure of both domain and test code. In this paper, I first describe how Mock Objects are used for unit testing of federation integration. Then I describe the benefits and costs of Mock Objects when writing unit tests and code. Finally I describe a design of Mock federate for using Mock objects.

• JSTS:Journal of Semiconductor Technology and Science
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• v.2 no.2
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• pp.132-140
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• 2002

This paper presents an ARM-based SOC bus transaction verification IP and the usage experiences in SOC designs. The verification IP is an AMBA AHB protocol checker, which captures legal AHB transactions in FSM-style signal sequence checking routines. This checker can be considered as a reusable verification IP since it does not change unless the bus protocol changes. Our AHB protocol checker is designed to be scalable to any number of AHB masters and reusable for various AMBA-based SOC designs. The keys to the scalability and the reusability are Object-Oriented Programming (OOP), virtual port, and bind operation. This paper describes how OOP, virtual port, and bind features are used to implement AHB protocol checker. Using the AHB protocol checker, an AHB simulation monitor is constructed. The monitor checks the legal bus arbitration and detects the first cycle of an AHB transaction. Then it calls AHB protocol checker to check the expected AHB signal sequences. We integrate the AHB bus monitor into Verilog simulation environment to replace time-consuming visual waveform inspection, and it allows us to find design bugs quickly. This paper also discusses AMBA AHB bus transaction coverage metrics and AHB transaction coverage analysis. Test programs for five AHB masters of an SOC, four channel DMAs and a host interface unit are executed and transaction coverage for DMA verification is collected during simulation. These coverage results can be used to determine the weak point of test programs in terms of the number of bus transactions occurred and guide to improve the quality of the test programs. Also, the coverage results can be used to obtain bus utilization statistics since the bus cycles occupied by each AHB master can be obtained.

• Korean Journal of Digital Imaging in Medicine
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• v.10 no.1
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• pp.29-34
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• 2008

Purpose To analyze the input and output error of data CD which records the image information and the problems of the server of the compatibility. And to report a compatibility assessment and verification of suitable to DICOM of PACS data CD with investigation of current situation of Korea METHOD AND MATERIALS Date CD of each 8 vendors in 30 hospitals was analyzed. We grasped a main verification element existence of a generation compatibility of data CD. The items of element are media identification, DICOM compression, DICOM viewer send, specified object information modify, auto-run, DICOM content type, etc, and give 1 point for each item. We divided the assessment about an each item into 5 levels. Verification about. DICOM conformance by using DICOM validation tool kit is shown to be classified pass or fail according to error occurrence of tag valus. Classify the prequency of tag occurrence as the item. RESULTS The average point of date CD compatibility is 8 point (very good), lowest is 5 point (6.6%), and highest is 10 point (23%_. Most high occurrence frequency's distribution is 7 point (36.6%). As a result of verification about DICOM conformance, PASS in 8 occurrence frequency's distribution is 7 point (36.6%). As a result of verification about DICOM maximum length numbers (14 items), DICOM error of modality (10 items), discord of pixel data length (6 items). etc.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2015.05a
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• pp.866-869
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• 2015

In this paper, we propose a device for detect front object using low-price the CW Doppler sensor to prevent safety accident such as a bicycle, an electric wheelchair users. For this propose, we develop a signal process board and the object motion detect algorithm using to analyzing output signal of the CW Doppler sensor. Output signal from CW Doppler sensor is analog I and analog Q. The CW Doppler sensor shows phase I and phase Q of object differently when the object approach, stop, drop by sensor. We develop an algorithm that can detect object by discrimination information of phase using the CW Doppler sensor. The verification use firmware of applied hardware and algorithm. Then, the motion information can be confirming output depending on motion object by experiment normally. As a result, we check that the sensing information output by following motion of object and confirm an algorithm and motion of signal processing board.

• Journal of Internet Computing and Services
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• v.12 no.5
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• pp.101-111
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• 2011

Most researches in WSN-based parking management system used wireless sensors to monitor the events in a car parking area. However, the problem of car collisions in car parks was not discussed by previous researches. The car position details over time are vital in analyzing a collision event. This paper proposes a collision verification method to detect and to analyze the collision event in the parking area, and then notifies car owners. The detection uses the information from motion sensors for comprehensive details of position and direction of a moving car, and the verification processes an object tracking technique with a fast OBB intersection test. The performance tests show that the location technique is more accurate with additional sensors and the OBB collision test is faster compared to a normal OBB intersection test.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.1
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• pp.493-496
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• 2005

In this paper, we propose a new approach to detect candidate area of vehicle license plate using compounded color and vertical edge information it's own. Also, we propose a verification course, to compressed image generated by Fast DCT, using SVM to increase accuracy of extracted vechicle license plate area. Proposed method is consider that vehicle's position, become a object of it's license plate recognition, has various angle, scale and include enough environment informations. As a experimental results, proposed method shows a superior performance compared with the case that not includes verification course using SVM.