• 제목/요약/키워드: nonbinary LDPC codes

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오류 마루 현상이 완화된 비이진 LDPC 부호의 설계 및 성능 분석 연구 (Design and Performance Analysis of Nonbinary LDPC Codes With Low Error-Floors)

  • 안석기;임승찬;양영오;양경철
    • 한국통신학회논문지
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    • 제38C권10호
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    • pp.852-857
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    • 2013
  • 본 논문은 오류 마루 영역에서 우수한 성능을 가지는 비이진 LDPC (low-density parity-check) 부호의 설계 방법을 제안하고 성능을 검증한다. 제안된 설계 방법은 비이진 LDPC 부호의 이진 최소 거리(binary minimum distance)를 최대화하도록 패리티 검사 행렬의 비이진 원소 값들을 결정한다. BPSK (binary phase-shift keying) 변조 방식 하에서 제안된 방법으로 설계된 비이진 LDPC 부호가 오류 마루(error floor) 영역에서 우수한 성능을 가지는 것을 Monte Carlo 시뮬레이션과 중요도 표본 추출(importance sampling) 기법을 사용하여 검증한다.

Nonbinary Multiple Rate QC-LDPC Codes with Fixed Information or Block Bit Length

  • Liu, Lei;Zhou, Wuyang;Zhou, Shengli
    • Journal of Communications and Networks
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    • 제14권4호
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    • pp.429-433
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    • 2012
  • In this paper, we consider nonbinary quasi-cyclic low-density parity-check (QC-LDPC) codes and propose a method to design multiple rate codes with either fixed information bit length or block bit length, tailored to different scenarios in wireless applications. We show that the proposed codes achieve good performance over a broad range of code rates.

Efficient Parallel Block-layered Nonbinary Quasi-cyclic Low-density Parity-check Decoding on a GPU

  • Thi, Huyen Pham;Lee, Hanho
    • IEIE Transactions on Smart Processing and Computing
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    • 제6권3호
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    • pp.210-219
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    • 2017
  • This paper proposes a modified min-max algorithm (MMMA) for nonbinary quasi-cyclic low-density parity-check (NB-QC-LDPC) codes and an efficient parallel block-layered decoder architecture corresponding to the algorithm on a graphics processing unit (GPU) platform. The algorithm removes multiplications over the Galois field (GF) in the merger step to reduce decoding latency without any performance loss. The decoding implementation on a GPU for NB-QC-LDPC codes achieves improvements in both flexibility and scalability. To perform the decoding on the GPU, data and memory structures suitable for parallel computing are designed. The implementation results for NB-QC-LDPC codes over GF(32) and GF(64) demonstrate that the parallel block-layered decoding on a GPU accelerates the decoding process to provide a faster decoding runtime, and obtains a higher coding gain under a low $10^{-10}$ bit error rate and low $10^{-7}$ frame error rate, compared to existing methods.

Challenges and Some New Directions in Channel Coding

  • Arikan, Erdal;Hassan, Najeeb ul;Lentmaier, Michael;Montorsi, Guido;Sayir, Jossy
    • Journal of Communications and Networks
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    • 제17권4호
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    • pp.328-338
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    • 2015
  • Three areas of ongoing research in channel coding are surveyed, and recent developments are presented in each area: Spatially coupled low-density parity-check (LDPC) codes, nonbinary LDPC codes, and polar coding.