• The Transactions of The Korean Institute of Electrical Engineers
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• v.63 no.3
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• pp.343-348
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• 2014

Recently, applications of VSC-HVDC systems to power systems are growing because of their control ability of reactive power. Meanwhile, the hardware-in-the-loop simulation (HILS) based on the real-time digital simulator has been applying to develop and test imbedded controllers and systems in the power industry to decrease costs and to save time. In this paper, a 3-level neutral point clamped (NPC) VSC-HVDC system is modeled and the embedded controllers of the NPC VSC-HVDC system are designed. The designed controllers are implemented by TMS320F28335. The TMS320F28335-based controllers of the NPC VSC-HVDC system are tested using the HILS.

• Journal of Electrical Engineering and Technology
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• v.9 no.6
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• pp.2168-2180
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• 2014

In this paper, a generalized power loss algorithm for multilevel neutral-point clamped (NPC) PWM inverters is presented, which is applicable to any level number of multilevel inverters. In the case of three-level inverters, the conduction loss depends on the MI (modulation index) and the PF (power factor), and the switching loss depends on a switching frequency, turn-on and turn-off energy. However, in the higher level of inverters than the three-level, the loss of semiconductor devices cannot be analyzed by conventional methods. The modulation depth should be considered in addition, to find the different conducting devices depending on the MI. In a case study, the power loss analysis for the three- and five-level NPC inverters has been performed with the proposed algorithm. The validity of the proposed algorithm is verified by simulation for the three-and five-level NPC inverters and experiment for three-level NPC inverter.

• The Transactions of the Korean Institute of Power Electronics
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• v.19 no.2
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• pp.173-183
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• 2014

In this paper, an analysis of power losses for the three-level T-type and neutral-point clamped (NPC) PWM inverters is presented, in which the conduction and switching losses of semiconductor devices of the inverters are taken into account. In the inverter operation, the conduction loss depends on the modulation index (MI) and power factor (PF), whereas the switching loss depends on the switching frequency. Power losses for the T-type and NPC inverters are analyzed and calculated at the different operating points of MI, PF and the switching frequency, in which the four different models of semiconductor devices are adopted. In the case of lower MI, the NPC-type is more efficient than the T-type, and vice versa. The validity of the power loss analysis has been verified by the simulation results.

• Journal of Power Electronics
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• v.19 no.1
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• pp.108-118
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• 2019

This paper proposes a DC-link voltage balance controller using the fourth-phase of a three-level neutral-point clamped (NPC) PWM converter with medium vector selection (MVS) PWM for common-mode voltage reduction. MVS PWM makes the voltage reference by synthesizing the voltage vectors that cannot generate common-mode voltage. This PWM method is effective for reducing the EMI noise emitted from converter systems. However, the DC-link voltage imbalance problem is caused by the use of limited voltage vectors. Therefore, in this paper, the effect of MVS PWM on the DC-link voltage of a three-level NPC converter is analyzed. Then a proportional-derivative (PD) controller for the DC-link voltage balance is designed from the DC-link modeling. In addition, feedforward compensation of the neutral point current is included in the proposed PD controller. The effectiveness of the proposed controller is verified by experimental results.

• Proceedings of the KIEE Conference
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• 1997.11a
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• pp.42-45
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• 1997

A synchronous solid-state var compensator(SSVC) system which employs a three-phase neutral-point-darned (NPC) inverter is presented and analyzed for high voltage and high power applications. The proposed SSVC system can compensate for leading and lagging displacement factor. An optimal pulse-width-modulation (PWM) is used as a means of reducing the size of reactive components. A equivalent model is obtained using DQ-transform, and the characteristic of open-loop system are archived from DC and AC analyzes. A $\alpha$ phase-shift control is suggested using a self-controlled dc bus.

• Proceedings of the KIPE Conference
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• 2018.07a
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• pp.316-317
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• 2018

This paper propse the DC link capacitor voltage balancing control for three level neutral point clamped converter with harmonic component injection method. The injcetion voltage consists of harmonic component and DC link capacitor voltage difference. Theoretical analysis is provided to balance the DC link voltage, and it shows that harmonic component compensates the unbalanced condition between the capacitors. Both simulations and experiments are carried out to show that the voltage unbalance have been decreased by the proposed method.

• Proceedings of the KIPE Conference
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• 2015.07a
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• pp.315-316
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• 2015

본 논문에서는 3-레벨 Neutral-Point-Clamped (NPC) 인버터의 DC-Link 중성점 전압 리플을 저감하여 인버터 출력 전압의 품질 신뢰성 향상이 가능한 새로운 Discontinuous Pulse Width Modulation (DPWM) 기법을 제안한다. NPC 인버터에서는 두 개의 커패시터로 이루어진 DC-Link 구조로 인해 상, 하단 DC-Link 커패시터 전압 불평형인 상황에서 DC-Link 중 성점 전압 리플이 발생한다. 중성점 전압 리플 발생 시 출력 전압의 품질을 보장할 수 없으며, 민감한 부하에 손상을 입힐 수 있다. 제안한 DPWM 알고리즘은 DC-Link 커패시터 전압을 조정하는 두 개의 오프셋을 사용하여 중성점 전압 리플을 저감한다. 또한, 시뮬레이션을 통해 본 논문에서 제안한 알고리즘의 타당성을 검증한다.

• Proceedings of the KIPE Conference
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• 2004.07b
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• pp.630-634
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• 2004

A new three phase three-level Pulse Width Modulation (PWM) Switched Voltage Source (SVS) inverter with zero neutral point potential is proposed. The major advantage is that the peak value of the phase output voltage is twice as high as that of the conventional neutral-point-clamped (NPC) PWM inverter. Furthermore, three-level waveforms of the proposed inverter can be achieved without switch voltage unbalance problem. Since the average neutral point potential of the proposed inverter is zero, the common ground between input stage and output stage is possible. The proposed inverter is verified by experimental results based on a laboratory prototype.

• Proceedings of the KIPE Conference
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• 2012.11a
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• pp.249-250
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• 2012

해상 풍력 발전은 가장 유망한 재생 에너지원의 하나이며, 육상 풍력 발전보다 풍력이 강력하고 일정하여 장시간 고출력 발생이 가능하다. 또한 소음, 공간적 한계, 경관훼손 등 기존 육상 풍력 발전의 단점을 보완하고 초대형 단지조성이 가능한 장점이 있다. 초대형 해상풍력단지에는 일반적으로 MW급의 해상풍력발전기가 사용된다. 본 논문에서는 MW급의 해상 풍력발전기에 ANPC(Active Neutral-Point-Clamped) Multi-Level VSC(Voltage Source Converter)를 적용하여 Back-to-Back으로 구성한 시스템을 제안하고 계통연계형 풍력 발전 시스템을 모의한 시뮬레이션을 통하여 제안된 시스템의 성능을 검증한다.

• Proceedings of the KIPE Conference
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• 2016.11a
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• pp.131-132
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• 2016

3-레벨 중성점 다이오드 클램프(NPC) 컨버터는 high-power medium voltage(MV)에서 많이 응용된다. 하지만 3-레벨 중성점 다이오드 클램프(NPC) 컨버터는 각 스위치 소자에서 손실이 불균형하게 발생하게 되어 스위치 소자 간 성능이 불균형하게 된다. 따라서 본 논문에서는 단상 3-레벨 중성점 다이오드 클램프(NPC) 컨버터의 기존 모델 예측 제어의 스위칭 패턴을 분석 및 스위칭 순환방식을 이용한 효율적인 스위칭 상태를 갖는 모델 예측 제어를 제안한다. 이를 통해 PI 제어기 기반의 펄스 폭 변조 방법과 기존 모델 예측 제어 방법의 손실 비교를 통하여 제안하는 모델 예측 제어 성능을 검증한다.