• Title/Summary/Keyword: n+ emitter layer

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결정질 실리콘 태양전지의 n+ emitter층 형성에 관한 특성연구 (The investigation of forming the n+ emitter layer for crystalline silicon solar cells)

  • 권혁용;이재두;김민정;이수홍
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2010년도 하계학술대회 논문집
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    • pp.233-233
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    • 2010
  • It is important to form the n+ emitter layer for generating electric potential collecting EHP(Electron-Hole Pair). In this paper the formation on the n+ emitter layer of silicon wafer has been made with respect to uniformity of shallow diffusion from a liquid source. The starting material was crystalline silicon wafers of resistivity $0.5{\sim}3\{Omega}{\cdot}cm$, p-type, thickness $200{\mu}m$, direction[100]. The formation of n+ emitter layer from the liquid $POCl_3$ source was carried out for $890^{\circ}C$ in an ambient of $N_2:O_2$::10:1 by volume. And than each conditions are pre-deposition and drive-in time. It has been made uniformity of at least. so, the average of sheet resistance was about 0.12%. In this study, sheet resistance was measured by 4-point prove.

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n형 규소 태양전지 emitter형성에 미치는 열처리 변수의 영향 (The effect of heat treatment parameters on the emitter formation of the n-type silicon solar cell)

  • 심지명;김영관
    • 한국결정성장학회지
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    • 제18권5호
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    • pp.179-183
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    • 2008
  • n형 실리콘를 이용히여 후면에 Al-emitter형성에 관해 �x처리조건이 Voc에 어떤 영향을 미치는지 알아보기 위하여 screen printing 방법으로 n-type Si 기판에 Al을 도포하였다. 열처기는 straight profile에서 50 inch/min의 belt speed로 $850^{\circ}C$의 peak temperature로 수행한 경우 가장 높은 Voc(585 mV)값을 보였고, 이 온도보다 낮은 경우에 불 균일한 Al-Si alloy 층이 형성되고, 이 온도보다 높은 경우에 Al층으로 Si 원자의 이동이 극심하게 발생되어 Al-Si alloy층이 파괴되는 현상으로 인하여 Voc가 감소함을 보았다.

UV Laser를 이용한 Borosilicate-Glass (BSG)층의 선택적 에미터 형성 (Selective Emitter Formation of Borosilicate-Glass (BSG) Layer using UV Laser)

  • 김가민;장효식
    • 한국재료학회지
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    • 제31권12호
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    • pp.727-731
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    • 2021
  • In this study, we have investigated a selective emitter using a UV laser on BBr3 diffusion doping layer. The selective emitter has two regions of high and low doping concentration alternatively and this structure can remove the disadvantages of homogeneous emitter doping. The selective emitters were fabricated by using UV laser of 355 nm on the homogeneous emitters which were formed on n-type Si by BBr3 diffusion in the furnace and the heavy boron doping regions were formed on the laser regions. In the optimized laser doping process, we are able to achieve a highly concentrated emitter with a surface resistance of up to 43 Ω/□ from 105 ± 6 Ω/□ borosilicate glass (BSG) layer on Si. In order to compare the characteristics and confirm the passivation effect, the annealing is performed after Al2O3 deposition using an ALD. After the annealing, the selective emitter shows a better effect than the high concentration doped emitter and a level equivalent to that of the low concentration doped emitter.

High Rs 최적화에 따른 selective emitter solar cell의 특성변화에 관한 연구

  • 안시현;박철민;조재현;장경수;백경현;이준신
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2011년도 제40회 동계학술대회 초록집
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    • pp.393-393
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    • 2011
  • 오늘 날 태양전지 산업에서 가장 많은 생산을 하고 있는 분야는 결정질 태양전지분야이다. 현재는 이러한 시대적 요구에 따라 많은 연구가 진행되고 있는데 특히 junction을 이루는 n layer의 doping profile을 선택적으로 형성하여 개방전압 및 단락전류를 향상시키는 연구가 활발히 진행되고 있다. 본 연구는 이러한 n type layer의 doping profile을 선택적으로 형성하는 selective emitter solar cell에 관한 연구로써 SILVACO simulation을 이용하여 low Rs 영역은 고정하고 high Rs 영역의 doping depth를 가변 함으로써 high Rs 영역을 달리 형성하는 방법으로 selective emitter solar cell의 high Rs영역의 최적화에 관한 전산모사를 실시하였다. 각각의 가변조건에 따라 quantum efficiency를 통한 광학적 분석과 I-V를 통한 전기적 분석을 하여 high Rs영역을 최적화 하였다.

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Fabrication of Field-Emitter Arrays using the Mold Method for FED Applications

  • Cho, Kyung-Jea;Ryu, Jeong-Tak;Kim, Yeon-Bo;Lee, Sang-Yun
    • Transactions on Electrical and Electronic Materials
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    • 제3권1호
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    • pp.4-8
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    • 2002
  • The typical mold method for FED (field emission display) fabrication is used to form a gate electrode, a gate oxide layer, and emitter tip after fabrication of a mold shape using wet-etching of Si substrate. However, in this study, new mold method using a side wall space structure was developed to make sharp emitter tips with the gate electrode. In new method, gate oxide layer and gate electrode layer were deposited on a Si wafer by LPCVD (low pressure chemical vapor deposition), and then BPSG (Boro phosphor silicate glass) thin film was deposited. After then, the BPSG thin film was flowed into the mold at high temperature in order to form a sharp mold structure. TiN was deposited as an emitter tip on it. The unfinished device was bonded to a glass substrate by anodic bonding techniques. The Si wafer was etched from backside by KOH-deionized water solution. Finally, the sharp field emitter array with gate electrode on the glass substrate was formed.

새로운 정공차폐 층 (Hole blocking layer)으로 DCJTB 도핑된 24MeSAlq를 이용한 백색유기발광다이오드 (White Organic Light-Emitting Diodes Using DCJTB-Doped 24MeSAlq as a New Hole-Blocking Layer)

  • 김미숙;임종태;염근영
    • 한국재료학회지
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    • 제16권4호
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    • pp.231-234
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    • 2006
  • To obtain balanced white-emission and high efficiency of the organic light-emitting diodes (OLEDs), a deep blue emitter made of N,N'-diphenyl-N,N'-bis(1-naphthyl)- (1,1'-biphenyl)-4,4'-diamine (NPB) emitter and a new red emitter made of the Bis(2,4 -dimethyl-8-quinolinolato)(triphenylsilanolato)aluminum(III) (24MeSAlq) doped with red fluorescent 4-(dicyanomethylene)-2-tert-butyl-6-(1,1,7,7-tetramethyljulolidyl-9-enyl)-4H -pyran (DCJTB) were used and the device was tuned by varying the thickness of the DCJTB-doped 24MeSAlq and $Alq_3$. For the white OLED with 10 nm thickness DCJTB (0.5%) doped 24MeSAlq and 45 nm thick $Alq_3$, the maximum luminance of about 29,700 $Cd/m^2$ could be obtained at 14.8 V. Also, Commission Internationale d'Eclairage (CIE) chromaticity coordinates of (0.32, 0.28) at about 100 $Cd/m^2$, which is very close to white light equi-energy point (0.33, 0.33), could be obtained.

Investigations of the Boron Diffusion Process for n-type Mono-Crystalline Silicon Substrates and Ni/Cu Plated Solar Cell Fabrication

  • Lee, Sunyong;Rehman, Atteq ur;Shin, Eun Gu;Lee, Soo Hong
    • Current Photovoltaic Research
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    • 제2권4호
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    • pp.147-151
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    • 2014
  • A boron doping process using a boron tri-bromide ($BBr_3$) as a boron source was applied to form a $p^+$ emitter layer on an n-type mono-crystalline CZ substrate. Nitrogen ($N_2$) gas as an additive of the diffusion process was varied in order to study the variations in sheet resistance and the uniformity of doped layer. The flow rate of $N_2$ gas flow was changed in the range 3 slm~10 slm. The sheet resistance uniformity however was found to be variable with the variation of the $N_2$ flow rate. The optimal flow rate for $N_2$ gas was found to be 4 slm, resulting in a sheet resistance value of $50{\Omega}/sq$ and having a uniformity of less than 10%. The process temperature was also varied in order to study its influence on the sheet resistance and minority carrier lifetimes. A higher lifetime value of $1727.72{\mu}s$ was achieved for the emitter having $51.74{\Omega}/sq$ sheet resistances. The thickness of the boron rich layer (BRL) was found to increase with the increase in the process temperature and a decrease in the sheet resistance was observed with the increase in the process temperature. Furthermore, a passivated emitter solar cell (PESC) type solar cell structure comprised of a boron doped emitter and phosphorus doped back surface field (BSF) having Ni/Cu contacts yielding 15.32% efficiency is fabricated.

태양전지를 위한 다양한 표면 패시베이션(passivation) 막들의 연구 (Investigation of varied suface passivation layers for solar cells)

  • 이지연;이수홍
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2004년도 춘계학술대회 논문집 디스플레이 광소자분야
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    • pp.90-93
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    • 2004
  • In this work, we have used different techniques for the surface passivation: conventional thermal oxidation (CTO), rapid thermal oxidation (RTO), and plasma-enhanced chemical vapour deposition (PECVD). The surface passivation qualities of eight different single and combined double layer have been investigated both on the phosphorus non-diffused p-type FZ silicon and on phosphorus diffused emitter of 100 ${\Omega}/Sq$ and 40 ${\Omega}/Sq$. In the single layer, silicon dioxide $(SiO_2)$ passivates good on the emitter while silicon nitride (SiN) passivates better than on the non-diffused surface. In the double layers, CTO/SiN1 passivates very well both on non-diffused surface on the emitter. However, RTO/SiN1 and RTO/SiN2 stacks are more suitable for surface passivation in solar cells caused by a relatively good passivation qualities and the low optical reflection. Applying these stacks in solar cells we achieved 18.5 % and 18.8 % on 0.5 ${\Omega}$ cm FZ-Si with planar and textured front surface, respectively. The excellent open circuit voltage $(V_{oc})$ of 675.6 mV is obtained the planar cell with RTO/SiN stack.

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Fabrication and Characteristics of Lateral Type Field Emitter Arrays

  • Lee, Jae-Hoon;Kwon, Ki-Rock;Lee, Myoung-Bok;Hahm, Sung-Ho;Park, Kyu-Man;Lee, Jung-Hee
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제2권2호
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    • pp.93-101
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    • 2002
  • We have proposed and fabricated two lateral type field emission diodes, poly-Si emitter by utilizing the local oxidation of silicon (LOCOS) and GaN emitter using metal organic chemical vapor deposition (MOCVD) process. The fabricated poly-Si diode exhibited excellent electrical characteristics such as a very low turn-on voltage of 2 V and a high emission current of $300{\;}\bu\textrm{A}/tip$ at the anode-to-cathode voltage of 25 V. These superior field emission characteristics was speculated as a result of strong surface modification inducing a quasi-negative electron affinity and the increase of emitting sites due to local sharp protrusions by an appropriate activation treatment. In respect, two kinds of procedures were proposed for the fabrication of the lateral type GaN emitter: a selective etching method with electron cyclotron resonance-reactive ion etching (ECR-RIE) or a simple selective growth by utilizing $Si_3N_4$ film as a masking layer. The fabricated device using the ECR-RIE exhibited electrical characteristics such as a turn-on voltage of 35 V for $7\bu\textrm{m}$ gap and an emission current of~580 nA/l0tips at anode-to-cathode voltage of 100 V. These new field emission characteristics of GaN tips are believed to be due to a low electron affinity as well as the shorter inter-electrode distance. Compared to lateral type GaN field emission diode using ECR-RIE, re-grown GaN emitters shows sharper shape tips and shorter inter-electrode distance.

Mold 법에 의해 제작된 FED용 전계에미터어레이의 특성 분석 (Fabrication & Properties of Field Emitter Arrays using the Mold Method for FED Application)

  • 류정탁;조경제;이상윤;김연보
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2001년도 하계학술대회 논문집
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    • pp.347-350
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    • 2001
  • A typical Mold method is to form a gate electrode, a gate oxide, and emitter tip after fabrication of mold shape using wet-etching of Si substrate. In this study, however, new Mold method using a side wall space structure is used in order to make sharper emitter tip with a gate electrode. Using LPCVD(low pressure chemical vapor deposition), a gate oxide and electrode layer are formed on a Si substrate, and then BPSG(Boro phospher silicate glass) thin film is deposited. After, the BPSG thin film is flowed into a mold as high temperature in order to form a sharp mold structure. Next TiN thin film is deposited as a emitter tip substance. The unfinished device with a glass substrate is bonded by anodic bonding techniques to transfer the emitters to a glass substrate, and Si substrate is etched using KOH-deionized water solution. Finally, we made sharp field emitter array with gate electrode on the glass substrate.

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