• The KIPS Transactions:PartA
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• v.8A no.2
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• pp.107-116
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• 2001

A multithreaded model is a hybrid one which combines locality of execution of the von Neumann model with asynchronous data availability and implicit parallelism of the dataflow model. Much researches that have been made toward the advanced performance of multithreaded models are about the cache memory which have been proved to be efficient in the von Neumann model. To use an instruction cache or operand cache, the multithreaded models must have cache memories. If cache memories are added to the multithreaded model, they may have the disadvantage of high implementation cost in the mode. To solve these problems, we did not add cache memory but applied the method of executing the caching by using available registers of the multithreaded models. The available register-based caching method is one that use the registers which are not used on the execution of threads. It may accomplish the same effect as the cache memory. The multithreaded models can compute the number of available registers to be used during the process of the register optimization, and therefore this method can be easily applied on the models. By applying this method, we can also remove the access conflict and the bottleneck of frame memories. When we applied the proposed available register-based caching method, we found that there was an improved performance of the multithreaded model. Also, when the available-register-based caching method is compared with the cache based caching method, we found that there was the almost same execution overhead.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.8 no.3
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• pp.965-983
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• 2014

Concurrent behaviors of multithreaded programs cannot be described effectively by automata-based models. Thus, concurrent program intrusion attempts cannot be detected. To address this problem, we proposed the process algebra-based detection model for multithreaded programs (PADMP). We generate process expressions by static binary code analysis. We then add concurrency operators to process expressions and propose a model construction algorithm based on process algebra. We also present a definition of process equivalence and behavior detection rules. Experiments demonstrate that the proposed method can accurately detect errors in multithreaded programs and has linear space-time complexity. The proposed method provides effective support for concurrent behavior modeling and detection.

• Journal of Electrical Engineering and information Science
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• v.1 no.2
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• pp.15-26
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• 1996

MPAs(Massively Parallel Architectures) should address two fundamental issues for scalability: synchronization and communication latency. Dataflow architecture faces problems of excessive synchronization overhead and inefficient execution of sequential programs while they offer the ability to exploit massive parallelism inherent in programs. In contrast, MPAs based on von Neumann computational model may suffer from inefficient synchronization mechanism and communication latency. DAVRID (DAtaflow/Von Neumann RISC hybrID) is a massively parallel multithreaded architecture which takes advantages of von Neumann and dataflow models. It has good single thread performance as well as tolerates synchronization and communication latency. In this paper, we describe the DAVRID architecture in detail and evaluate its performance through simulation runs over several benchmarks.

• Proceedings of the Korea Society for Industrial Systems Conference
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• 2002.06a
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• pp.148-155
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• 2002

Multithreaded models improve the efficiency of parallel systems by combining inner parallelism, asynchronous data availability and the locality of von Neumann model. This model executes thread code which is generated by compiler and of which quality is given by the method of generation. But multithreaded models have the demerit that execution model is restricted to a specific platform. On the contrary, Java has the platform independency, so if we can translate from threads code to Java bytecode, we can use the advantages of multithreaded models in many platforms. Java executes Java bytecode which is intermediate language format for Java virtual machine. Java bytecode plays a role of an intermediate language in translator and Java virtual machine work as back-end in translator. But, Java bytecode which is translated from multithreaded models have the demerit that it is not secure. This paper, multhithread code whose feature of platform independent can execute in java virtual machine. We design and implement translator which translate from thread code of multithreaded code to Java bytecode and which check secure problems from Java bytecode.

• Journal of KIISE:Computing Practices and Letters
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• v.5 no.6
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• pp.708-718
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• 1999

본 논문에서 제안하는 시스템은 일반적인 병렬 시스템의 하드웨어 구조에서, 다중 스레드 계산 모델을 이용하여 객체 지향 프로그래밍 환경을 구현한 시스템이다. 제안하는 시스템을 효과적으로 구현하기 위하여 컴파일러와 실행 시간 시스템의 측면에서 여러 가지 기법을 제시한다. 컴파일러의 측면에서는 멤버 변수의 접근 분석, 메소드의 병렬성 분석 기법을 제시하고, 실행 시간 시스템에서는 실시간 스레드/메시지 결합, 프레임 공유 기법을 제시한다. 본 논문에서 제안된 프로그래밍 환경은, MPI 메시지 인터페이스를 이용하여 구현하였으며, 벤치마크 프로그램을 실행함으로써 성능 분석을 하였다. 분석의 결과는 실행시간 시스템의 여러 가지 기법들이 성능 향상에 많은 효과가 있음을 보여주며, 이러한 결과는 일반적인 병렬 시스템에서도 적용 가능하다.Abstract In this paper, we suggest an object-oriented programming environment with multithreaded computation model on general parallel processing systems. We developed many methods for our environment to be efficient : in compiler, the analysis of member variable and method parallelism, and in runtime system, thread/message merging and frame sharing. The programming environment is implemented with MPI message interface, and its performance is analyzed with executing benchmark programs. The results show that the developed methods have influence on performance improvement, and this improvement can be applied to general parallel processing systems.

• The Transactions of the Korea Information Processing Society
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• v.2 no.6
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• pp.974-984
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• 1995

This paper presents a design of a high performance MULVEC (MULtithreaded architecture for the VEctor Computations), as a building block of massively parallel Processing systems. The MULVEC comes from the synthesis of the dataflow model and the extant super sclar RISC microprocesso r. The MULVEC reduces, using status fields, the number of synchronizations in the case of repeated vector computations within the same thread segment, and also reduces the amount of the context switching, network traffic, etc. After be nchmark programs are simulated on the SPARC station 20(super scalar RISC microprocessor)the performance (execution time of programs and the utilization of processors) of MULVEC and the performance(execution time of a program) of *Taccording the different numbers of node are analyzed. We observed that the execution time of the program in MULVEC is faster than that in * T about 1-2 times according the number of nodes and the number of the repetitions of the loop.

• Journal of Internet Computing and Services
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• v.8 no.3
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• pp.75-83
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• 2007

Multithreaded model is an effective parallel system in that it can reduce the long memory reference latency time and solve the synchronization problems. When compiling the non-strict functional programs for the multithreaded parallel machine, the most important thing is to find an set of sequentially executable instructions and to partitions them into threads. The existing partitioning algorithm partitions the condition of conditional expression, true expression and false expression into the basic blocks and apply local partitioning to these basic blocks. We can do the better partitioning if we modify the definition of the thread and allow the branching within the thread. The branching within the thread do not reduce the parallelism, do not increase the number of synchronization and do not violate the basic rule of the thread partitioning. On the contrary, it can lengthen the thread and reduce the number of synchronization. In the paper, we enhance the method of the partition of threads by combining the three basic blocks into one of two blocks.

• The Transactions of the Korea Information Processing Society
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• v.3 no.4
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• pp.791-802
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• 1996

In this paper, we discuss a distributed shared memory management scheme based on multi-threaded programming model for a large-scale loosely coupled multiprocessor system. The scheme covers three major issues in the distribued shared memory;the address translation table management, the block coherence maintenance, and the block placement policy. The scheme efficiently resolves the general problems occurred in the distributed shared memory such as a false sharing, an unnecessary replication, a block bouncing, and an address aliasing phenomenon. It also provides the application transparency, good scalability, easy implementation, and multithreaded programming model to users.

• ETRI Journal
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• v.43 no.5
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• pp.825-834
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• 2021

Based on its simplicity and user-friendly characteristics, OpenMP has become the standard model for programming on shared-memory architectures. Checkpointing-aided parallel execution (CAPE) is an approach that utilizes the discontinuous incremental checkpointing technique (DICKPT) to translate and execute OpenMP programs on distributed-memory architectures automatically. Currently, CAPE implements the OpenMP execution model by utilizing the DICKPT to distribute parallel jobs and their data to slave machines, and then collects the results after executing these distributed jobs. Although this model has been proven to be effective in terms of performance and compatibility with OpenMP on distributed-memory systems, it cannot fully exploit the capabilities of multicore processors. This paper presents a novel execution model for CAPE that utilizes two levels of parallelism. In the proposed model, we add another level of parallelism in the form of multithreaded processes on slave machines with the goal of better exploiting their multicore CPUs. Initial experimental results presented near the end of this paper demonstrate that this model provides significantly enhanced CAPE performance.

• The KIPS Transactions:PartD
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• v.15D no.1
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• pp.99-106
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• 2008

Recently developed compilers perform some optimizations in order to speed up the execution time of source program. These optimizations require the reordering of the sequence of program statements. This reordering does not give any problems in a single-threaded program. However, the reordering gives some significant errors in a multi-threaded program. State-of-the-art model checkers such as JavaPathfinder do not consider the reordering resulted in the optimization step in a compiler since they just consider a single memory model. In this paper, we develop a new verification tool to verify Java source program based on Java Memory Model. And our tool is capable of handling the reordering in verifying Java programs. As a result, our tool finds an error in the test program which is not revealed with the traditional model checker JavaPathFinder.