• Title/Summary/Keyword: multiprocessor systems

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Mutual exclusion of shared memory access in the simulation software of the midclass commuter (중형항공기 시뮬레이션 소프트웨어의 작업간 공유메모리 사용의 상호배제)

  • 이인석;이해창;이상혁
    • 제어로봇시스템학회:학술대회논문집
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    • 1996.10b
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    • pp.207-209
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    • 1996
  • The software of the midclass commuter flight simulation is running on multiprocessor/multitasking environments The software is consist of tasks which are periodically alive at a given interval. Each task communicates via shared memory. The data shared by tasks is divided by several block. Only one task, called producer, can produce data for a data block but several tasks, called consumers, can read data from the data block. Double buffer and conditional flag are used to implement a mutual exclusion which prevents the producer and consumers from accessing the same data block simultaneously.

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A Study on the Multiple Fault-Tolerant Multipath Multistage Interconnection Network (다중 고정이 허용되는 다중경로 다단상호접속망에 관한 연구)

  • 김대호;임채택
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.25 no.8
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    • pp.972-982
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    • 1988
  • In multiprocessor systems, there are Omega network and M network among various MIN's which interconnect the processor and memory modules. Both one-path Omega network and two-path M network are composed of Log2N stages. In this paper, Augmented M network (AMN) with 2**k+1 paths and Augmented Omega network (AON) with 2**k paths are proposed. The proposed networks can be acomplished by adding K stage(s) to M network and Omega network. Using destination tag, routing algorithm for AMN and AON becomes simple and multiple faults are tolerant. By evaluating RST(request service time) performance of AMN and AON with (Log2N)+K stages, we demonstrated the fact that MMIN (AMN) with 2**k+1 paths performs better than MMIN(AON) with 2**k+1. paths.

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Developement and control of a sensor based quadruped walking robot

  • Bien, Zeungnam;Lee, Yun-Jung;Suh, Il-Hong;Lee, Ji-Hong
    • 제어로봇시스템학회:학술대회논문집
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    • 1990.10b
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    • pp.1087-1092
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    • 1990
  • This paper describes the development and control of a quadruped walking robot, named as KAISER-II. The control system with multiprocessor based hierachical structure is developed. In order to navigate autonomously on a rough terrain, an identification algorithm for robot's position is proposed using 3-D vision and guide-mark pattern Also, a simple attitude control algorithm is included using force sensors. Through experimental results, it is shown that the robot can not only walk statically on even terrain but also cross over or go through the artificially made obstacles such as stairs, horizontal bar and tunnel-typed one.

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A Parallel Matching in AI Production Systems (인공지능 생성시스템에서의 병렬 매칭)

  • 강승일;윤종민;정규식
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.32B no.3
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    • pp.89-99
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    • 1995
  • One of the hardest problems that limit real application of production system is its slowness. One way to overcome this problem is to speed up the matching operation which occupies more than 90% of the total execution time. In this paper, we try to speed up the matching operation with parallel execution of a typical pattern matching algorithm, RETE, in a multiprocessor environment, This requires not only to make partitions of the rules but also to allocate the partitioned rules to processors, respectively. A partition strategy is proposed to make groups of similar rules by evaluating the similarity of rules according to the number of common conditions between rules. An allocation strategy is proposed to make the load of each processor even by assigning the different priority to the group of rules according to the expected amount of time required for matching operation. To compare with the existing methods, we perform simulation using OPS5 sample programs. The simulation results show that the proposed methods can improve the performance of production system.

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A Heuristic Scheduling Algorithm for Reducing the Total Error of an Imprecise Multiprocessor System with 0/1 Constraint

  • Song, Ki-Hyun;Park, Kyung-Hee;Park, Seung-Kyu;Park, Dug-Kyoo;Yun, Kyong-Ok
    • Journal of Electrical Engineering and information Science
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    • v.2 no.6
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    • pp.1-6
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    • 1997
  • The scheduling problem of satisfying both 0/1 constraint and the timing constraint while minimizing the total error is NP-complete when the optional parts have arbitrary processing times. In this paper, we present a heuristic scheduling algorithm for 0/1 constraint imprecise systems which consist of communicating tasks running on multiple processors. The algorithm is based on the program graph which is similar to the one presented in[4]. To check the schedulability, we apply Lawler and Moore's theorem. To analyze the performance of the proposed algorithm, intensive simulation is done. The results of the simulation shows that the longest processing first selection strategy outperforms random or minimal laxity policies.

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Fault tolerant real-time task scheduling approach in Multiprocessor Systems (다중프로세서 시스템에서 고장 감내 실시간 스케줄 기법)

  • 구현우;홍영식
    • Proceedings of the Korean Information Science Society Conference
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    • 2003.10a
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    • pp.280-282
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    • 2003
  • 많은 산업 분야에서 사용되는 실시간 시스템은 논리적 정확성뿐만 아니라 시간적 정확성을 요구한다. 그래서 실시간 시스템에서 동작하는 작업들은 항상 마감시간을 지키기 위해 작업에 대한 스케줄링이 매우 중요한 요소가 된다. 그리고 시스템의 신뢰도를 높이기 위해서는 고장 감내가 반드시 필요하다. 특히. 현대 기술의 발달로 일부 분야에서 사용되어 지던 실시간 시스템이 실시간 내장형 시스템 형태로 다양한 분야에 사용되어 진다. 내장형 시스템을 개발하는데 있어 자원의 절약 또한 하나의 중요한 요소이다. 따라서 본 논문에서는 실시간 시스템에서의 작업들이 마감 시간을 만족하며 고장 감내를 보장하는 시간 중복 기법과 백업 기법을 혼합하여 주기적으로 동작하는 작업들의 신뢰도와 자원의 효율 및 절약을 높이는 스케줄링 기법을 제안하고 실험한다.

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병렬분산 환경에서의 DEVS형식론의 시뮬레이션

  • Seong, Yeong-Rak;Jung, Sung-Hun;Kon, Tag-Gon;Park, Kyu-Ho-
    • Proceedings of the Korea Society for Simulation Conference
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    • 1992.10a
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    • pp.5-5
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    • 1992
  • The DEVS(discrete event system specification) formalism describes a discrete event system in a hierarchical, modular form. DEVSIM++ is C++ based general purpose DEVS abstract simulator which can simulate systems to be modeled by the DEVS formalism in a sequential environment. We implement P-DEVSIM++ which is a parallel version of DEVSIM++. In P-DEVSIM++, the external and internal event of models can be processed in parallel. To process in parallel, we introduce a hierarchical distributed simulation technique and some optimistic distributed simulation techniques. But in our algorithm, the rollback of a model is localized itself in contrast to the Time Warp approach. To evaluate its performance, we simulate a single bus multiprocessor architecture system with an external common memory. Simulation result shows that significant speedup is made possible with our algorithm in a parallel environment.

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An Implementation of the DEVS Formalism on a Parallel Distributed Environment (병렬 분산 환경에서의 DEVS 형식론의 구현)

  • 성영락
    • Journal of the Korea Society for Simulation
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    • v.1 no.1
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    • pp.64-76
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    • 1992
  • The DEVS(discrete event system specificaition) formalism specifies a discrete event system in a hierarchical, modular form. DEVSIM++ is a C++based general purpose DEVS abstract simulator which can simulate systems modeled by the DEVS formalism in a sequential environment. This paper describes P-DEVSIM++which is a parallel version of DEVSIM++ . In P-DEVSIM++, the external and internal event of DEVS models can by processed in parallel. For such processing, we propose a parallel, distributed optimistic simulation algorithm based on the Time Warp approach. However, the proposed algorithm localizes the rollback of a model within itself, not possible in the standard Time Warp approach. An advantage of such localization is that the simulation time may be reduced. To evaluate its performance, we simulate a single bus multiprocessor architecture system with an external common memory. Simulation result shows that significant speedup is made possible with our algorithm in a parallel environment.

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Incremental Design of MIN using Unit Module (단위 모듈을 이용한 MIN의 점증적 설계)

  • Choi, Chang-Hoon;Kim, Sung-Chun
    • Journal of KIISE:Computer Systems and Theory
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    • v.27 no.2
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    • pp.149-159
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    • 2000
  • In this paper, we propose a new class of MIN (Multistage Interconnection Network) called SCMIN(ShortCut MIN) which can form a cheap and efficient packet switching interconnection network. SCMIN satisfies full access capability(FAC) and has multiple redundant paths between processor-memory pairs even though SCMIN is constructed with 2.5N-4 SEs which is far fewer SEs than that of MINs. SCMIN can be constructed suitable for localized communication by providing the shortcut path and multiple paths inside the processor-memory cluster which has frequent data communications. Therefore, SCMIN can be used as an attractive interconnection network for parallel applications with a localized communication pattern in shared-memory multiprocessor systems.

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A Parallel Implementation of Multiple Non-overlapping Cameras for Robot Pose Estimation

  • Ragab, Mohammad Ehab;Elkabbany, Ghada Farouk
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.8 no.11
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    • pp.4103-4117
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    • 2014
  • Image processing and computer vision algorithms are gaining larger concern in a variety of application areas such as robotics and man-machine interaction. Vision allows the development of flexible, intelligent, and less intrusive approaches than most of the other sensor systems. In this work, we determine the location and orientation of a mobile robot which is crucial for performing its tasks. In order to be able to operate in real time there is a need to speed up different vision routines. Therefore, we present and evaluate a method for introducing parallelism into the multiple non-overlapping camera pose estimation algorithm proposed in [1]. In this algorithm the problem has been solved in real time using multiple non-overlapping cameras and the Extended Kalman Filter (EKF). Four cameras arranged in two back-to-back pairs are put on the platform of a moving robot. An important benefit of using multiple cameras for robot pose estimation is the capability of resolving vision uncertainties such as the bas-relief ambiguity. The proposed method is based on algorithmic skeletons for low, medium and high levels of parallelization. The analysis shows that the use of a multiprocessor system enhances the system performance by about 87%. In addition, the proposed design is scalable, which is necaccery in this application where the number of features changes repeatedly.