• 전자공학회논문지A
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• 제32A권10호
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• pp.93-101
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• 1995

The evaluation of the logic capability and the library generation method of the multiplexor-based logic module is described. Optimizing logic module for silicon area and logic capability is essential to build a efficient FPGAs(Field-Programmable Gate Arrays). Because the multiplexor-based logic module can implement a large number of functions, it presents difficulties for library-based approaches. However, the logic functions of the logic module can be significantly reduced by lmiting the number of variables and sum-of-products and by removing same functions with different variable ordering using algorithm presented in this paper.

• Journal of Electrical Engineering and information Science
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• 제2권3호
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• pp.29-40
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• 1997

Two asymptotic analyses of the queue length distribution at a statistical multiplexor supporting heterogeneous exponential on-off sources are considered. The first analysis is performed by approximating the cell generation rates as a multi-dimensional Ornstein-Uhlenbeck process and then applying the Benes queueing formula. In the second analysis, w state with a system of linear equations derived from the exact expressions of the dominant eigenvalue of the matrix governing the queue length distribution. Assuming that there are a large number of sources, we obtain asymptotic approximations to the dominant eigenvalue. Based on the analyses, we define a traffic descriptor to include the mean and the variance of the cell generation rate and a burstiness measure. A simple expression for the quality of service (QoS) in cell loss rate is derived in terms of the traffic descriptor parameters and the multiplexor parameters (output link capacity and buffer size). The result is then used to quantify the factors determining the required capacity of a call taking the statistical multiplexing gain into consideration. As an application of the analyses, we can use the required capacity calculation for simple yet effective connection admission control(CAC) algorithms.

• 한국ITS학회 논문지
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• 제11권4호
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• pp.63-69
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• 2012

본 논문에서는 용량성 지문센서의 회색조 이미지를 얻기 위한 새로운 회로를 제안하고 있다. 기존의 회로는 회색조 이미지를 얻기 위해 많은 칩 면적을 차지하는 DAC를 적용하거나 전력소모가 많고 전역 클럭을 적용하는 비휘발성 메모리에 적용되는 승압회로를 픽셀별로 적용하였다. 개선된 전하분할 방식의 용량성 지문센서 감지회로는 뉴런모스(vMOS) 기반의 DLC(down literal circuit) 회로와 단순화된 아날로그 MUX(multiplexor)를 적용하였다. 설계된 감지회로는 0.3V, $0.35{\mu}m$ CMOS공정을 적용하여 동작을 검증하였다. 제안된 회로는 기존의 비교기와 주변회로를 필요로하지 않으므로 단위 픽셀의 레이아웃 면적을 줄이고 이미지의 해상도를 향상 시킬 수 있다.

• 한국정보과학회:학술대회논문집
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• 한국정보과학회 2000년도 가을 학술발표논문집 Vol.27 No.2 (3)
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• pp.428-430
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• 2000

최근 고속 가입자망의 급속한 보급과 인터넷 정보가전 개발의 활성화는 홈네트워킹으로 불리우는 새로운 컴퓨팅 환경을 등장시켰다. 홈네트워킹 환경에서는 IPv4 주소공간의 부족과 내부 네트워크와 기존의 인터넷 사이에 연결성을 제공하기 위해서 풀어야 할 문제들이 있다. 또한, 정보가전에 내장되어 있는 웹서버를 관리.제어.확장하기 위한 기능성도 제공되어야 한다. 본 연구에서는 홈네트워킹 환경에서 발생하는 문제점들을 효과적으로 해결할 수 있는 웹서버 멀티플렉서 프레임워크를 설계하고 구현한다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2000년도 하계학술대회 논문집
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• pp.787-789
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• 2000

High temperature superconducting YBCO films have been grown on MgO substrates by pulsed laser deposition (PLD) with Nd:YAG laser Superconducting microwave filter was fabricated by conventional photolithography method. We have designed filter with the center frequency of 14 GHz. We have measured the center frequency of filter at 77 K and its critical temperature 89K. Also we have designed another filter to compare frequency responses. The measured frequency responses will be presented.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 추계종합학술대회 논문집
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• pp.1133-1136
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• 1998

본 논문에서 최적화이론이란 이 논문에서 두 개의 회로를 비교하고 트랜지스터의 개수를 적게 사용하여 전력소비를 줄일 수 있었고, 면적을 적게 축소하였다. 그리고 입출력에서 사용하는 제어는 크게 두 개로 나누었다. 첫 번째로 인버터를 사용해서 순차적으로 진행하도록 한 파이프라인의 회로를 설계하였고, 두 번째로 논리회로를 이용해서 n개의 MUX를 동시에 동작하도록 제어하였다. 두 개의 회로에서 트랜지스터의 개수와 반도체 칩의 면적 그리고 소비전력을 비교하여본다.

• 대한산업공학회지
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• 제19권3호
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• pp.103-111
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• 1993

There are four flexor muscles at elbow-biceps brachii, brachialis, brachioradialis, pronator teres. Muscle exertion force depends on the following conditions : elbow angle, external workload, and endurance time. The objectives of this study are to investigate the variations of the recruitment patterns of four muscles, and to analyze the changes of the role assigned to each muscle during elbow flexion. For three elbow angles, the transition point of type F motor unit of each muscle is inferred and the changes of the role assigned due to exertion level are identified by electromyographic analysis. The results showed that the recruitment pattern of biceps brachii is constant but those of other muscles are varied depending on elbow angle and exertion level. An EMG multiplexor is developed and simultaneous measurement of electromyographic signals of four elbow flexors is possible.

• 대한전기학회논문지
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• 제35권6호
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• pp.209-216
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• 1986

This paper describes the design of multi channel data acquisiton system for industrial process automation. The prototype hardware assembly consists of Z-80A microprocessor, 10-bit A/D converter with 16-channel analog multiplexor and related interface circuitry. The first order lag filter, which can be implemented without any particular computational problem has implemented in software, and the simulation results are shown. The protype system can communicate with a central processor through RS-232C, and can be used either as an intelligent stand-alone controller or as a satellite controller which can be monitored and controlled by a central processor. The singal conditioners for various temperature and humidity sensors are designed and experimental results are shown.

• 전자공학회논문지C
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• 제34C권3호
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• pp.11-22
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• 1997

This paper presents the design and implementation of an efficient algorithm for detecting untestable paths in multi-level circuits. Transforming multi-level circuit into a multiplexor-based one through BDD(binary decision diagram)construction, the proposed algorithm detects untestable paths in the transformed circuits. By constructing ENF (equivalent normal form) only for reconvergent paths, the proposed system detects and removes untestable paths efficiently in terms of the run-time and memory usage. Experimental results for MCNC/ISCAS benchmark circuits show that the system efficiently detects and removes untestable paths. The run-time and memory usage have been reduced by 37.7% and 60/9%, respectively, comapred to the previous methods.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1999년도 추계종합학술대회 논문집
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• pp.925-928
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• 1999

A multi-channel gas leakage monitoring system was designed and fabricated by using CPLD(complex Programmable Logic .Device) for monitoring and controlling the leakage of natural gas from supplying-pipes under the ground. Fabricated SnO$_2$thick film gas sensor elements were attached on safeguard steel plate of natural gas supplying pipes, and the local monitoring system in this study received the signal from the gas sensors. The monitoring system was implemented by using CPLD chip to reduce the development time and implement simple one chip system. The time division multi-channel system received the input signal from individual gas sensor at one of divided times by multiplexor and signal processed sequentially. The system reduced the size of peripheral circuit resulted in implementation of creditable simple system.