• Title/Summary/Keyword: multi-level-optimization

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CNN-based Fast Split Mode Decision Algorithm for Versatile Video Coding (VVC) Inter Prediction

  • Yeo, Woon-Ha;Kim, Byung-Gyu
    • Journal of Multimedia Information System
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    • v.8 no.3
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    • pp.147-158
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    • 2021
  • Versatile Video Coding (VVC) is the latest video coding standard developed by Joint Video Exploration Team (JVET). In VVC, the quadtree plus multi-type tree (QT+MTT) structure of coding unit (CU) partition is adopted, and its computational complexity is considerably high due to the brute-force search for recursive rate-distortion (RD) optimization. In this paper, we aim to reduce the time complexity of inter-picture prediction mode since the inter prediction accounts for a large portion of the total encoding time. The problem can be defined as classifying the split mode of each CU. To classify the split mode effectively, a novel convolutional neural network (CNN) called multi-level tree (MLT-CNN) architecture is introduced. For boosting classification performance, we utilize additional information including inter-picture information while training the CNN. The overall algorithm including the MLT-CNN inference process is implemented on VVC Test Model (VTM) 11.0. The CUs of size 128×128 can be the inputs of the CNN. The sequences are encoded at the random access (RA) configuration with five QP values {22, 27, 32, 37, 42}. The experimental results show that the proposed algorithm can reduce the computational complexity by 11.53% on average, and 26.14% for the maximum with an average 1.01% of the increase in Bjøntegaard delta bit rate (BDBR). Especially, the proposed method shows higher performance on the sequences of the A and B classes, reducing 9.81%~26.14% of encoding time with 0.95%~3.28% of the BDBR increase.

Power Optimization Method Using Peak Current Modeling for NAND Flash-based Storage Devices (낸드 플래시 기반 저장장치의 피크 전류 모델링을 이용한 전력 최적화 기법 연구)

  • Won, Samkyu;Chung, Eui-Young
    • Journal of the Institute of Electronics and Information Engineers
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    • v.53 no.1
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    • pp.43-50
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    • 2016
  • NAND flash based storage devices adopts multi-channel and multi-way architecture to improve performance using parallel operation of multiple NAND devices. However, multiple NAND devices consume higher current and peak power overlap problem influences on the system stability and data reliability. In this paper, current waveform is measured for erase, program and read operations, peak current and model is defined by profiling method, and estimated probability of peak current overlap among NAND devices. Also, system level TLM simulator is developed to analyze peak overlap phenomenon depending on various simulation scenario. In order to remove peak overlapping, token-ring based simple power management method is applied in the simulation experiments. The optimal peak overlap ratio is proposed to minimize performance degradation based on relationship between peak current overlapping and system performance.

Future Direction of Mission Operation System for Satellite Constellation and the Automation Priority Evaluation (군집위성 임무운영시스템 발전방향 및 자동화 우선순위 평가)

  • Jung, Insik;Yoon, Jeonghun;Lee, Myungshin;Lee, Junghyun;Kwon, Kybeom
    • Journal of Aerospace System Engineering
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    • v.16 no.3
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    • pp.10-22
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    • 2022
  • According to the Space Development Promotion Basic Plan, more than 110 satellites are expected to be deployed by 2031. Accordingly, the operation concept and technology for satellites constellation are required, compared to the existing few multi-satellite operations. It is essential to automate and optimize the mission operation system, for efficient operation of the satellite constellation, and preparations are urgently needed for the operation of satellite constellation in domestic as well. In this study, the development direction and strategy of the mission operation system applying automation and optimization for efficient operation of the satellite constellation are proposed. The framework for evaluating the automation level and priority of the mission operation system was developed, to identify the tasks to which automation should be applied preferentially.

Priority Based Interface Selection for Overlaying Heterogeneous Networks

  • Chowdhury, Mostafa Zaman;Jang, Yeong-Min
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.7B
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    • pp.1009-1017
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    • 2010
  • Offering of different attractive opportunities by different wireless technologies trends the convergence of heterogeneous networks for the future wireless communication system. To make a seamless handover among the heterogeneous networks, the optimization of the power consumption, and optimal selection of interface are the challenging issues. The access of multi interfaces simultaneously reduces the handover latency and data loss in heterogeneous handover. The mobile node (MN) maintains one interface connection while other interface is used for handover process. However, it causes much battery power consumption. In this paper we propose an efficient interface selection scheme including interface selection algorithms, interface selection procedures considering battery power consumption and user mobility with other existing parameters for overlaying networks. We also propose a priority based network selection scheme according to the service types. MN‘s battery power level, provision of QoS/QoE and our proposed priority parameters are considered as more important parameters for our interface selection algorithm. The performances of the proposed scheme are verified using numerical analysis.

Boolean Factorization Technique Using Two-cube Terms (2개의 곱항에서 공통인수를 이용한 논리 분해식 산출)

  • Kwon, Oh-Hyeong
    • Proceedings of the IEEK Conference
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    • 2005.11a
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    • pp.849-852
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    • 2005
  • A factorization is an extremely important part of multi-level logic synthesis. The number of literals in a factored from is a good estimate of the complexity of a logic function, and can be translated directly into the number of transistors required for implementation. Factored forms are described as either algebraic or Boolean, according to the trade-off between run-time and optimization. A Boolean factored form contains fewer number of literals than an algebraic factored form. In this paper, we present a new method for a Boolean factorization. The key idea is to identify two-cube Boolean subexpression pairs from given expression. Experimental results on various benchmark circuits show the improvements in literal counts over the algebraic factorization based on Brayton's co-kernel cube matrix.

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Evaluation of Recurrent Neural Network Variants for Person Re-identification

  • Le, Cuong Vo;Tuan, Nghia Nguyen;Hong, Quan Nguyen;Lee, Hyuk-Jae
    • IEIE Transactions on Smart Processing and Computing
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    • v.6 no.3
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    • pp.193-199
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    • 2017
  • Instead of using only spatial features from a single frame for person re-identification, a combination of spatial and temporal factors boosts the performance of the system. A recurrent neural network (RNN) shows its effectiveness in generating highly discriminative sequence-level human representations. In this work, we implement RNN, three Long Short Term Memory (LSTM) network variants, and Gated Recurrent Unit (GRU) on Caffe deep learning framework, and we then conduct experiments to compare performance in terms of size and accuracy for person re-identification. We propose using GRU for the optimized choice as the experimental results show that the GRU achieves the highest accuracy despite having fewer parameters than the others.

Boolean Factorization (부울 분해식 산출 방법)

  • Kwon, Oh-Hyeong
    • Journal of the Korean Society of Industry Convergence
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    • v.3 no.1
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    • pp.17-27
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    • 2000
  • A factorization is an extremely important part of multi-level logic synthesis. The number of literals in a factored form is a good estimate of the complexity of a logic function. and can be translated directly into the number of transistors required for implementation. Factored forms are described as either algebraic or Boolean, according to the trade-off between run-time and optimization. A Boolean factored form contains fewer number of literals than an algebraic factored form. In this paper, we present a new method for a Boolean factorization. The key idea is to build an extended co-kernel cube matrix using co-kernel/kernel pairs and kernel/kernel pairs together. The extended co-kernel cube matrix makes it possible to yield a Boolean factored form. We also propose a heuristic method for covering of the extended co-kernel cube matrix. Experimental results on various benchmark circuits show the improvements in literal counts over the algebraic factorization based on Brayton's co-kernel cube matrix.

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Real-time Flood Forecasting Model for Irrigation Reservoir Using Simplex Method (최적화기법에 의한 관개저수지의 실시간 홍수예측모형)

  • 문종필;김태철
    • Magazine of the Korean Society of Agricultural Engineers
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    • v.43 no.2
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    • pp.85-93
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    • 2001
  • The basic concept of the model is to minimize the error range between forecasted flood inflow and actual flood inflow, and forecast accurately the flood discharge some hours in advance depending on the concentration time(Tc) and soil moisture retention storage(Sa). Simplex method that is a multi-level optimization technique was used to search for the determination of the best parameters of RETFLO (REal-Time FLOod forecasting) model. The flood forecasting model developed was applied to several strom event of Yedang reservoir during past 10 years. Model perfomance was very good with relative errors of 10% for comparison of total runoff volume and with one hour delayed peak time.

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Boolean Factorization Technique Using Two-cube Terms (2개의 곱항에서 공통인수를 이용한 논리 분해식 산출)

  • Kwon, Oh-Hyeong
    • Journal of the Korea Computer Industry Society
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    • v.7 no.4
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    • pp.293-298
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    • 2006
  • A factorization is an extremely important part of multi-level logic synthesis. The number of literals in a factored form is a good estimate of the complexity of a logic function, and can be translated directly into the number of transistors required for implementation. Factored forms are described as either algebraic or Boolean, according to the trade-off between run-time and optimization. A Boolean factored form contains fewer number of literals than an algebraic factored form. In this paper, we present a new method for a Boolean factorization. The key idea is to identify two-cube Boolean subexpression pairs from given expression. Experimental results on various benchmark circuits show the improvements in literal counts over the algebraic factorization based on Bryton's co-kernel cube matrix.

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FEM Analysis for Optimization of Hot Forging Process of Piston Crown (피스톤크라운의 열간단조공정 최적화를 위한 유한요소해석)

  • Min, K.Y.;Lim, S.J.;Choi, H.J.;Choi, S.O.;Park, Y.B.
    • Transactions of Materials Processing
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    • v.18 no.6
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    • pp.444-447
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    • 2009
  • Piston crown to the hot forge a unified nature of the product has a shape with multi-level step forging process, so if you are not a mechanical professional, this process could lead to a significant loss to the material. Therefore, material technology in minor terms; continue to improve the collection rate that undamaged the product material. The piston crown and the manufacturing products such as marine diesel engines are being forged to reduce costs and to improve mechanical properties. Piston crown molding is a hot forging process that works in large volume forging products. Because of the size of the hard plastic material flow process for improving the design and actual field experience through advanced plastic technology, it is important to interpret the results. Also for many experimental plastic procedures, the accumulation of results is very important.