• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.134-135
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• 2008

Ultra-thin $SiO_2/ZrO_2$ dielectrics were deposited by atomic layer chemical vapor deposition (ALCVD) method for non-volatile memory application. Metal-oxide-semiconductor (MOS) capacitors were fabricated by stacking ultra-thin $SiO_2$ and $ZrO_2$ dielectrics. It is found that the tunneling current through the stacked dielectric at the high voltage is lager than that through the conventional silicon oxide barrier. On the other hand, the tunneling leakage current at low voltages is suppressed. Therefore, the use of ultra-thin $SiO_2/ZrO_2$ dielectrics as a tunneling barrier is promising for the future high integrated non-volatile memory.

• Journal of Electrical Engineering and Technology
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• v.7 no.4
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• pp.582-588
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• 2012

In this paper, a highly miniaturized and performed UWB bandpass filter has been newly designed and implemented by embedding all the passive elements into a multi-layered PCB substrate with high dielectric $SrTiO_3$ composite film for 3.1 - 4.75 GHz compact UWB system applications. The high dielectric composite film was utilized to increase the capacitance densities and quality factors of capacitors embedded into the PCB. In order to reduce the size of the filter and avoid parasitic EM coupling between the embedded filter circuit elements, it was designed by using a $3^{rd}$ order Chebyshev circuit topology and a capacitive coupled transformation technology. Independent transmission zeros were also applied for improving the attenuation of the filter at the desired stopbands. The measured insertion and return losses in the passband were better than 1.68 and 12 dB, with a minimum value of 0.78 dB. The transmission zeros of the measured response were occurred at 2.2 and 5.15 GHz resulting in excellent suppressions of 31 and 20 dB at WLAN bands of 2.4 and 5.15 GHz, respectively. The size of the fabricated bandpass filter was $2.9{\times}2.8{\times}0.55(H)mm^3$.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.3
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• pp.541-546
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• 2010

The push-push DRO(dielectric resonator oscillator) using a multi-layer structure of LTCC(low temperature co-fired ceramic) fabrication is designed. After the single DRO of series feedback type in the center frequency of 8GHz is designed, the push-push DRO in the center frequency of 16GHz including the Wilkinson power combiner is designed. The bias circuit affecting the size of oscillator are embedded in the intermediate layer of the LTCC multi-layer substrate. As a result, the large reduction in the size of VCO is obtained compared to the general oscillator on the single layer substrate. Experimental results show that the fundamental and third harmonics suppression are above 15dBc and 25dBc, respectively, and phase noise characteristics of the push-push DRO presents performance of -102dBc/Hz@100KHz and -128dBc/Hz@1MHz offset frequencies from carrier.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1995.05a
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• pp.187-191
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• 1995

Thin film of the (Pb$\_$1-x/La.sub x/)(Zr$\_$0.25/Ti/Sub 0.48/) O$_3$(x=0~13[at%]) were prepared by Sol - Gel method. Multi-layer PLZT thin films were fabricated by spin-coating on Pt/Ti/SiO$_2$/Si substrate. The crystallinity and microstructure of the films were investigated with the sintering condition. At the sintering temperature of of 600[$^{\circ}C$], the perovskite phase was dominat. PLZT(11/52/48)thin films sintered at 600[$^{\circ}C$], 1[hr] had good dielectric constant (1236), dielectric loss (2.2[%]), remanent polarization (1.38[${\mu}$C/$\textrm{cm}^2$] and coercive field(16.86[ kV/cm]) respectively.

• Transactions on Electrical and Electronic Materials
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• v.4 no.4
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• pp.13-17
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• 2003

This paper deals with the edge effect in thin insulating films, focusing on their dependence on film thickness. The finding is that the electric field is lowered at the edge as the film thickness is reduced, which, in turn, is closely related to dielectric breakdown voltage. In order to analyze this phenomenon, a simple capacitor model is introduced with which dependence of dielectric breakdown voltage around the electrode edge on the film thickness is explained. Due to analytical difficulty to get the expression of electrical field strength at the edge, an equivalent circuit approach is used to find the voltage expression first and then the electric field expression using it. The relation gets to an agreement with the experimental findings shown in the paper. This outcome may be extended to solve similar problems in multi-layer insulating films.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.1
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• pp.70-78
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• 1995

In order to implement broadband RAM's(Radar Absorbing Materials) made up of multiple dielectricl layers, the design variables such as the dielectrci constaints, the depths and the loss tangents of dielectric are optimized. The wave impedances regarding the reflective wave are found in dielectrics, input impedances and reflection coefficients with multiple dielectric layers are derived from the transmission line circuit theory. Finally, minimum average reflective power and optimum design variables are obtained by applying the numerical technique, called modified Powell method. In case of four dielectric layers with inequality constraints in design variables, a quite favourable and feasible result with the total depth of 1.1 cm, the average reflective power of 0.85% over the bradband frequency range is obtained for a specific example.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.32 no.5
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• pp.175-182
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• 2022

Rare-earth elements were doped with Mg to enhance the temperature stability of dielectric properties of BaTiO₃ for its application to MLCC (Multi-Layer Ceramic Capacitor). The additives strongly affect both grain growth and densification behaviors during sintering, and hence dielectric properties. The additive effects therefore should be examined in each system with different additives. This study investigated the crystal structure, grain growth and densification behaviors and related variations in dielectric constant with respect to sintering temperature. Dielectric constant appears to be varied with grain size in a temperature range between 1200 and 1300℃, suggesting the importance of grain size control. The temperature dependence of grain size variation was well explained by an established theory correlating the grain growth behavior with grain boundary structure. This accordance provides a basis for sintering technique to control grain growth thus to improve dielectric constant in rare-earth doped BaTiO₃.

• Journal of Powder Materials
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• v.16 no.1
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• pp.37-42
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• 2009

In this study, the feasible test for the mechanical property characterization of $BaTiO_3$ ceramics and multi-layer ceramic capacitor(MLCC) was performed with nanoindentation technique. In case of $BaTiO_3$ ceramics, hardness and elastic modulus are dependent on the densification of specimen showing the highest hardness and elastic modulus values of 12.3 GPa and 155 GPa, respectively at $1260^{\circ}C$. In case of MLCC chip, hardness of dielectric layer was lower than that of margin region. The nanoindentation method could be useful tool for the measurement of mechanical property within $BaTiO_3$ dielectric layer of very thin thickness in high capacitance MLCC.

• Electrical & Electronic Materials
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• v.9 no.5
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• pp.476-482
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• 1996

The multi-dielectric layer SiO$_{2}$/Si$_{3}$N$_{4}$/SiO$_{2}$(ONO) is used to improve electrical capacitance and to scale down the memory device. In this paper, improvement of the capacitance by reducing the bottom oxide thickness in the nitride deposition with load lock(L/L) vacuum system is studied. Bottom oxide thickness under the nitride layer is measured by ellipsometer both in L/L and non-L/L systems. Both results are in the range of 3-10.angs. and 10-15.angs., respectively, independent of the nitride and top oxide thickness. Effective thickness and cell capacitance for SONOS capacitor are in the range of 50-52.angs. and 35-37fF respectively in the case of nitride 70.angs. in L/L vacuum system. Compared with non-L/L system, the bottom oxide thickness in the case of L/L system decreases while cell capacitance increases about 4 fF. The results obtained in this study are also applicable to ONO scaling in the thin bottom oxide region of memory stacked capacitor.

• Journal of The Institute of Information and Telecommunication Facilities Engineering
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• v.4 no.1
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• pp.31-36
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• 2005

In this paper, a planar type bandpass filter in multilayered PCB is presented. The multilayered PCB structure has some advantages on fabricating microwave devices such as the size reduction and ability of tight coupling by folding or embedding. The proposed BPF has two transmission zeros at the both sides of the center frequency by using independent electric and magnetic coupling structure. The designed BPF with four layer teflon PCBs of dielectric constant 2.94 has dimensions of 24x20x1.524 in mm, center frequency of 2.47GHz and bandwidth of about l00MHz. A good agrement is achieved between the measured result and the simulated one. The influences of air gaps between the layers are also analyzed and presented.