• Title/Summary/Keyword: multi-channel interface circuit

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Design of Cold-junction Compensation and Disconnection Detection Circuits of Various Thermocouples(TC) and Implementation of Multi-channel Interfaces using Them (다양한 열전쌍(TC)의 냉점보상과 단선감지 회로설계 및 이를 이용한 다채널 인터페이스 구현)

  • Hyeong-Woo Cha
    • Journal of IKEEE
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    • v.27 no.1
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    • pp.45-52
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    • 2023
  • Cold-junction correction(CJC) and disconnection detection circuit design of various thermocouples(TC) and multi-channel TC interface circuit using them were designed. The CJC and disconnection detection circuit consists of a CJC semiconductor device, an instrumentation amplifier(IA), two resistors and a diode for disconnection detection. Based on the basic circuit, a multi-channel interface circuit was also implemented. The CJC was implemented using compensation semiconductor and IA, and disconnection detection was detected by using two resistor and a diode so that IA input voltage became -0.42V. As a result of the experiment using R-type TC, the error of the designed circuit was reduced from 0.14mV to 3㎶ after CJC in the temperature range of 0℃ to 1400℃. In addition, it was confirmed that the output voltage of IA was saturated from 88mV to -14.2V when TC was disconnected from normal. The output voltage of the designed circuit was 0V to 10V in the temperature range of 0℃ to 1400℃. The results of the 4-channel interface experiment using R-type TC were almost identical to the CJC and disconnection detection results for each channel. The implemented multi-channel interface has a feature that can be applied equally to E, J, K, T, R, and S-type TCs by changing the terminals of CJC semiconductor devices and adjusting the IA gain.

Development of 32-Channel Image Acquisition System for Thickness Measurement of Retina (망막 두께 측정을 위한 32채널 영상획득장치 개발)

  • 양근호;유병국
    • Proceedings of the Korea Institute of Convergence Signal Processing
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    • 2003.06a
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    • pp.110-113
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    • 2003
  • In this paper, the multi-channel high speed data acquisition system is implemented. This high speed signal processing system for 3-D image display is applicable to the manipulation of a medical image processing, multimedia data and various fields of digital image processing. In order to convert the analog signal into digital one, A/D conversion circuit is designed. PCI interface method is designed and implemented, which is capable of transmission a large amount of data to computer. In order to, especially, channel extendibility of images acquisition, bus communication method is selected. By using this bus method, we can interface each module effectively. In this paper, 32-channel A/D conversion and PCI interface system for 3-dimensional and real-time display of the retina image is developed. The 32-channel image acquisition system and high speed data transmission system developed in this paper is applicable to not only medical image processing as 3-D representation of retina image but also various fields of industrial image processing in which the multi-point realtime image acquisition system is needed.

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A Multi-purpose Fingerprint Readout Circuit Embedding Physiological Signal Detection

  • Eom, Won-Jin;Kim, Sung-Woo;Park, Kyeonghwan;Bien, Franklin;Kim, Jae Joon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.6
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    • pp.793-799
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    • 2016
  • A multi-purpose sensor interface that provides dual-mode operation of fingerprint sensing and physiological signal detection is presented. The dual-mode sensing capability is achieved by utilizing inter-pixel shielding patterns as capacitive amplifier's input electrodes. A prototype readout circuit including a fingerprint panel for feasibility verification was fabricated in a $0.18{\mu}m$ CMOS process. A single-channel readout circuit was implemented and multiplexed to scan two-dimensional fingerprint pixels, where adaptive calibration capability against pixel-capacitance variations was also implemented. Feasibility of the proposed multi-purpose interface was experimentally verified keeping low-power consumption less than 1.9 mW under a 3.3 V supply.

Multi-Gbit/s Digital I/O Interface Based on RF-Modulation and Capacitive Coupling

  • Shin, Hyunchol
    • Journal of electromagnetic engineering and science
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    • v.4 no.2
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    • pp.56-62
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    • 2004
  • We present a multi-Gbit/s digital I/O interface based on RF-modulation and capacitive-coupling over an impedance matched transmission line. The RF-interconnect(RFI) can greatly reduce the digital switching noise and eliminate the dc power dissipation over the channel. It also enables reduced signal amplitude(as low as 200 ㎷) with enhanced data rate and affordable circuit overhead. This paper addresses the system advantages and implementation issues of RFI. A prototype on-chip RFI transceiver is implemented in 0.18-${\mu}{\textrm}{m}$ CMOS. It demonstrates a maximum data rate of 2.2 Gbit/s via 10.5-㎓ RF-modulation. The RFI can be very instrumental for future high-speed inter- and intra-ULSI data links.

A Multi-Channel Gigabit CMOS Optical Transmitter Circuit (멀티채널 기가비트 CMOS 광 송신기 회로)

  • Tak, Ji-Young;Kim, Hye-Won;Shin, Ji-Hye;Lee, Jin-Ju;Park, Sung-Min
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.12
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    • pp.52-57
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    • 2011
  • This paper presents a 4-channel optical transmitter circuit realized in a $0.18{\mu}m$ CMOS technology for high-speed digital interface. Particularly, the VCSEL driver exploits the feed-forward technique, and the pre-amplifier employs the pulse-width control. Thus, the optical transmitter operates at the bias current up to 4mA and the modulation current from $2{\sim}8mA_{pp}$. with the pulse-width distortion compensated effectively. The 4-channel optical transmitter array chip occupies the area of $1.0{\times}1.7mm^2$ and dissipates 35mW per channel at maximum current operations from a single 1.8V supply.

Cargo Inspection System Design and Boundary-Scan Test (화물 검색시스템 구현 및 Boundary_Scan Test)

  • Kim, Bong-Su;Kim, In-Su;Yoo, Sun-Won;Kim, Sung-Won;Lee, Sun-Wha;Yi, Yun;Han, Bum-Soo
    • Proceedings of the KIEE Conference
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    • 2002.11c
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    • pp.197-200
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    • 2002
  • We newly developed the procedures of X-ray Cargo inspection system with acquisition of multi-channel data, analog to digital converter and post logic circuit which is controlled by the FPGA. The IEEE1149.1 standard defines a four-wire serial interface(a fifth wire is optional)to access complex integrated circuits(ICs) such as PLD. This paper describes that Boundary_Scan test method applied to our home made cargo inspection system.

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Automatic Switching System for The Impedance Analysis of Multichannel icroelectrode Arrays: Limits and Improvement Scheme (다채널 미세전극칩 임피던스 분석을 위한 자동 스위칭 시스템: 한계점 및 개선 방안)

  • Lee, Seok-Young;Nam, Yoon-Key
    • Journal of Biomedical Engineering Research
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    • v.32 no.3
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    • pp.207-217
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    • 2011
  • Electrode impedances are measured to quantitatively characterize the electrode-electrolyte or cell-electrode interfaces. In the case of high-density microelectrode arrays(MEAs) that have been developed for brainmachine interface applications, the characterization process becomes a repeating and time-consuming task; a system that can perform the measurement and analysis in an automated fashion with accuracy and speed is required. However, due to the large number of channels, parasitic capacitance and off-capacitance components of the switching system become the major factors that decreased the accuracy for the measurement of high impedance microelectrodes. Here we investigated the implementation of automatic impedance measurement system with analyzing the causes of possible measurement-related problems in multichannel switching configuration. Based on our multi-channel measurement circuit model, we suggest solutions to the problems and introduce a novel impedance measurement scheme using electro-mechanical relays. The implemented measurement system could measure |Z| < 700 $k{\Omega}$ of impedance in - 10% errors, which can be widely applicable to high density neural recording MEAs.

Development of PC based Digital Controller of Ultrasonic Motor Using FPGA (FPGA를 이용한 초음파모터의 PC기반 디지털 제어기 개발)

  • Kim, Dong-Ok;Lee, Hwa-Chun;Song, Sung-Geun;Kim, Young-Dong;Lim, Young-Cheol;Park, Sung-Jun
    • The Transactions of the Korean Institute of Power Electronics
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    • v.12 no.6
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    • pp.500-509
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    • 2007
  • In this paper, we propose a novel pc-based 8-channel USB interface digital multi-controller (DMC) has capacity to be able to adjust ultrasonic motor's (USM's) the parameters-frequency, amplitude, phase difference using FPGA. The proposed DMC can control parameters directly by digital logic through a FPGA. Since it has counter circuit for rotary encoder to measure position and velocity of USM, the other separate circuits are unnecessary. Therefore, it could reduce the size of controller and the production cost. Finally, to verify the performance of proposed DMC, we tested the speed characteristic of two types USM with no-load as adjusting the parameters.

Digital Data Communication System for Mobile Network System Using CC1020 Chip (CC1020 Chip을 사용한 모바일 네트워크를 위한 디지털 데이터 통신 시스템)

  • Lim, Hyun-Jin;So, Heung-Kuk
    • Journal of the Institute of Convergence Signal Processing
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    • v.8 no.1
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    • pp.58-62
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    • 2007
  • Digital communication is important for reliability and mobilization of the multi-channel communication systems. Transmitting and receiving data for the mobilization should be possible in anywhere and in anytime. And this system must be designed light weight small size and low power. One are essential technology for implementing the mobile wireless communication system on the age of ubiquotos. Requirements in constructing such communication field are followings. At first data transmitting and receiving should be carried out by a simple command. Second, the device should be designed as hand-hold type and low power consumption. Third, data communication should be reliable. As one of examples, car to car system which is popular in the market is introduced here, All traffic information in highway is transmitted from one car to another by using this system which can prevent possible traffic accident. This paper shows the design of a digital data communication system with CC1020 chip. This CC1020 makes easy frequency selection and easy switch from the transmit mode to the receive mode by simple setting of a memory register in the chip. The transmit power of this system is designed 10dBm and its communication range is about 100m. The power supplied this system is 3V considered as low power. The sleep mode can be easily entered during transmit mode or receive mode. We shows the program algorithm of CC1020 and interface circuit between MCU and CC1020. We shows the Photo of the CC1020 Module and Atmega128 Module.. We analysed the receiver rate with this system.

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