• Title/Summary/Keyword: modular and versatile design

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Modular and versatile platform for the benchmarking of modern actuators for robots

  • Garcia, Elena;Gonzalez-de-Santos, Pablo
    • Smart Structures and Systems
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    • v.11 no.2
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    • pp.135-161
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    • 2013
  • This work presents a test platform for the assessment and benchmarking of modern actuators which have been specifically developed for the new field and service robotics applications. This versatile platform has been designed for the comparative analysis of actuators of dissimilar technology and operating conditions. It combines a modular design to adapt to linear and rotational actuators of different sizes, shapes and functions, as well as those with different load capacities, power and displacement. This test platform emulates the kinematics of robotic joints while an adaptive antagonist-load actuator allows reproducing the variable dynamic loads that actuators used in real robotics applications will be subjected to. A data acquisition system is used for monitoring and analyzing test actuator performance. The test platform combines hardware and software in the loop to allow actuator performance characterization. The use of the proposed test platform is demonstrated through the characterization and benchmarking of three controllable impedance actuators recently being incorporated into modern robotics.

Design and construction of fluid-to-fluid scaled-down small modular reactor platform: As a testbed for the nuclear-based hydrogen production

  • Ji Yong Kim;Seung Chang Yoo;Joo Hyung Seo;Ji Hyun Kim;In Cheol Bang
    • Nuclear Engineering and Technology
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    • v.56 no.3
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    • pp.1037-1051
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    • 2024
  • This paper presents the construction results and design of the UNIST Reactor Innovation platform for small modular reactors as a versatile testbed for exploring innovative technologies. The platform uses simulant fluids to simulate the thermal-hydraulic behavior of a reference small modular reactor design, allowing for cost-effective design modifications. Scaling analysis results for single and two-phase natural circulation flows are outlined based on the three-level scaling methodology. The platform's capability to simulate natural circulation behavior was validated through performance calculations using the 1-D system thermal-hydraulic code-based calculation. The strategies for evaluating cutting-edge technologies, such as the integration of a solid oxide electrolysis cell for hydrogen production into a small modular reactor, are presented. To overcome experimental limitations, the hardware-in-the-loop technique is proposed as an alternative, enabling real-time simulation of physical phenomena that cannot be implemented within the experimental facility's hardware. Overall, the proposed versatile innovation platform is expected to provide valuable insights for advancing research in the field of small modular reactors and nuclear-based hydrogen production.

Design of Self-Reconfigurable Kinematics and Control Engine for Modular Robot (모듈러 로봇의 작업 적응성을 위한 자가 재구성 제어 엔진)

  • Do, HyunMin;Choi, Tae-Yong;Park, DongIl;Kim, DooHyeong;Son, Youngsu
    • The Journal of Korea Robotics Society
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    • v.11 no.4
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    • pp.270-276
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    • 2016
  • This paper proposes a design methodology of self-reconfigurable kinematics and control engine for modular and reconfigurable robots. A modular manipulator has been proposed to meet the requirement of task adaptation in versatile needs for service and industrial robot area and the function of self-reconfiguration is required to extend the application of modular robots. Kinematic and dynamic contexts are extracted from the module and assembly information and related codes are automatically generated including controller. Thus a user can easily build and use a modular robot without professional knowledge. Simulation results are presented to verify the validity of the proposed method.

Development of a small avionics unit based on FPGA with soft CPU (소프트 CPU 내장형 FPGA 기반의 소형 전장품 개발)

  • Jeon, Sang-Woon
    • Aerospace Engineering and Technology
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    • v.12 no.2
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    • pp.131-139
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    • 2013
  • This paper describes the design and implementation of a small avionics unit based on soft CPU. A small avionics unit is developed with the soft CPU which can be wholly implemented in FPGA using logic synthesis. Design and integration of a modular architecture for versatile, reconfigurable and re-adaptable is presented with the Nios-II processor. To gain modular architecture, both at main board and sub-board level, attention has been paid to the selection of interfaces and an adequate data and power bus.

Design and Implementation of a Sequential Polynomial Basis Multiplier over GF(2m)

  • Mathe, Sudha Ellison;Boppana, Lakshmi
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.11 no.5
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    • pp.2680-2700
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    • 2017
  • Finite field arithmetic over GF($2^m$) is used in a variety of applications such as cryptography, coding theory, computer algebra. It is mainly used in various cryptographic algorithms such as the Elliptic Curve Cryptography (ECC), Advanced Encryption Standard (AES), Twofish etc. The multiplication in a finite field is considered as highly complex and resource consuming operation in such applications. Many algorithms and architectures are proposed in the literature to obtain efficient multiplication operation in both hardware and software. In this paper, a modified serial multiplication algorithm with interleaved modular reduction is proposed, which allows for an efficient realization of a sequential polynomial basis multiplier. The proposed sequential multiplier supports multiplication of any two arbitrary finite field elements over GF($2^m$) for generic irreducible polynomials, therefore made versatile. Estimation of area and time complexities of the proposed sequential multiplier is performed and comparison with existing sequential multipliers is presented. The proposed sequential multiplier achieves 50% reduction in area-delay product over the best of existing sequential multipliers for m = 163, indicating an efficient design in terms of both area and delay. The Application Specific Integrated Circuit (ASIC) and the Field Programmable Gate Array (FPGA) implementation results indicate a significantly less power-delay and area-delay products of the proposed sequential multiplier over existing multipliers.