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Development of a small avionics unit based on FPGA with soft CPU  

Jeon, Sang-Woon (단체계팀)
Publication Information
Aerospace Engineering and Technology / v.12, no.2, 2013 , pp. 131-139 More about this Journal
Abstract
This paper describes the design and implementation of a small avionics unit based on soft CPU. A small avionics unit is developed with the soft CPU which can be wholly implemented in FPGA using logic synthesis. Design and integration of a modular architecture for versatile, reconfigurable and re-adaptable is presented with the Nios-II processor. To gain modular architecture, both at main board and sub-board level, attention has been paid to the selection of interfaces and an adequate data and power bus.
Keywords
soft CPU; small avionics; FPGA; modular architecture; logic synthesis;
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