• Journal of Power Electronics
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• v.5 no.2
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• pp.104-108
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• 2005

This paper presents the performance improvement of voltage-mode controlled interleaved synchronous buck converters. This is a voltage-mode controlled scheme, where the controllers do not need an external saw-tooth generator for PWM generation and the loop design is easier. The controller implementation requires only a single error amplifier and gives almost current mode control performance. The control scheme uses voltage feedback with two loops similar to current mode control: one for the slow outer loop and the other for the faster inner PWM control loop. To improve the performance of the converter system a coupled inductor is used. This coupled inductor reduces the magnetic size and also improves the converter's transient performance without increasing the steady-state current ripple. The effectiveness of the proposed control scheme is demonstrated through PSIM simulations.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.33B no.3
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• pp.56-61
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• 1996

In this paper, new buck converter of a TV power system is presented. First, we devised a revised driving circuit for an emitter-coupled type buck converter, by which it is possible to reduce the material cost of transformers and voltage stress of power device. Secondly, we adopted a hybrid oscillation technique. When TV system is in off-stage, initial standby power which is necessary for remote controllable TV system is supplied by self-oscillating mode. Main power which is necessry in TV system bing on state is provided by an externally triggered oscillating mode. The switching frequency is synchronized to the oscillating frequency of horizontal deflection in TV, by which we can reduce picture noises and the size of power transformer. Thirdly, a simple error amplifier is inserted to the feed-back loop to keep the output voltage constant which means pulse width modulatio mode is added in driving part of power device. Finally, we showed by experiments that our proposed converter performs well enough to be close to the theoretically predicted values.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.50 no.8
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• pp.392-401
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• 2001

This paper presents the single-stage high power factor AC to DC converter operated in active-clamp mode. The proposed converter is added active-clamping circuit to boost-flyback single-stage power factor corrected power supply. The active-clamping circuit limits voltage spikes, recycles the energy trapped in the leakage inductance, and provides a mechanism for achieving soft switching of the electronic switches to reduce the switching loss. The auxiliary switch of active-clamping circuit uses the same control and driver circuit as the main switch to reduce the additional cost and size. To verify the performance of the proposed converter, a 100W converter has been designed. The proposed converter gives good power factor correction, low line current harmonic distortions, and tight output voltage regulation, as used unity power factor.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.42 no.4
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• pp.864-870
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• 2017

This paper describes a Dual Buck Converter with mode control using variable Frequency to Voltage for portable devices requiring wide load current. The inherent problems of PLL compensation and efficiency degradation in light load current that the conventional hysteretic buck converter has faced have been resolved by using the proposed Dual buck converter which include improved PFM Mode not to require compensation. The proposed mode controller can also improve the difficulty of detecting the load change of the mode controller, which is the main circuit of the conventional dual mode buck converter, and the slow mode switching speed. the proposed mode controller has mode switching time of at least 1.5us. The proposed DC-DC buck converter was implemented by using $0.18{\mu}m$ CMOS process and die size was $1.38mm{\times}1.37mm$. The post simulation results with inductor and capacitor including parasitic elements showed that the proposed circuit received the input of 2.7~3.3V and generated output of 1.2V with the output ripple voltage had the PFM mode of 65mV and 16mV at the fixed switching frequency of 2MHz in hysteretic mode under load currents of 1~500mA. The maximum efficiency of the proposed dual-mode buck converter is 95% at 80mA and is more than 85% efficient under load currents of 1~500mA.

• Proceedings of the KIPE Conference
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• 2010.11a
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• pp.173-174
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• 2010

In this paper, authors propose a new buck-boost converter of discontinuous conduction mode (DCM) added electric isolation. The proposed converter with DCM eliminates the complicated circuit control requirement and reduces the size of components. The general converters of high efficiency are made that the power loss of the used switching devices is minimized. To achieve the soft switching operation of the used control switches, the proposed converter uses a lossless snubber capacitor. The proposed converter achieves the soft-switching for all switching devices without increasing their voltage and current stresses. The result is that the switching loss is very low and the efficiency of converter is high. The soft switching operation of the proposed converter is verified by digital simulation and experimental results.

• Journal of Power Electronics
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• v.11 no.6
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• pp.793-800
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• 2011

This paper investigates the operational modes of buck dc-dc converters and their energy transmission methods. The operational modes of such converters are classified in two types, discontinuous conduction mode (DCM) and continuous conduction mode (CCM). In this paper, the critical inductance relation of DCM and CCM is determined. The equations of the output voltage ripple (OVR) for each mode are obtained for a specific input voltage and load resistance range. The maximum output voltage ripple (MOVR) is also obtained for each mode. The filter size is decreased and the minimum required inductance value is calculated to guarantee the minimization of the MOVR. The experimental and simulation results in PSCAD/EMTDC prove the correctness of the presented theoretical concepts.

• Journal of IKEEE
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• v.15 no.2
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• pp.134-142
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• 2011

This paper describes a tripple-mode high-efficiency DC-DC buck converter. The DC-DC buck converter operate in PWM(Pulse Width Modulation) mode at moderate to heavy loads(100mA~500mA), in PFM(Pulse Frequency Modulation)at light loads(1mA~100mA), and in LDO(Low Drop Out) mode at the sleep mode(<1mA). In PFM mode DPSS(Dynamic Partial Shutdown Strategy) is also employed to increase the efficiency at light loads. The triple-mode converter can thus achieve high efficiencies over wide load current range. The proposed DC-DC converter is designed in a CMOS 0.18um technology. It has a maximum power efficiency of 96.4% and maximum output current of 500mA. The input and output voltages are 3.3V and 2.5V, respectively. The chip size is 1.15mm ${\times}$ 1.10mm including pads.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.10a
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• pp.411-414
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• 2011

This paper describes a tripple-mode DC-DC buck converter with DPSS Fucntion. The DC-DC buck converter operate in PWM(Pulse Width Modulation) mode at moderate to heavy loads(80mA~500mA), in PFM(Pulse Frequency Modulation)at light loads(1mA~80mA), and in LDO(Low Drop Out) mode at the sleep mode(<1mA). In PFM mode DPSS(Dynamic Partial Shutdown Strategy) is also employed to increase the efficiency at light loads. The triple-mode converter can thus achieve high efficiencies over wide load current range. The proposed DC-DC converter is designed in a CMOS 0.18um technology. It has a maximum power efficiency of 97.02% and maximum output current of 500mA. The input and output voltages are 3.3V and 2.5V, respectively. The chip size is $1465um{\times}895um$ including pads.

• 전자공학회논문지 IE
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• v.47 no.2
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• pp.13-20
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• 2010

This paper describes a current mode PWM DC-DC converter IC for battery charger and supply power converter for portable electronic devices. The maximum supply voltage of IC is 40[V] and 2.8[V]~330[V] DC input power is converted to higher or programmed DC voltage according to external resistor ratio or wire winding ratio of transformer. The maximum supply output current is 3[A] over and voltage error of output node is within 3[%]. The whole circuit needed current mode PWM DC-DC converter circuit is designed. The package dimensions and number of external parts are minimized in order to get a smaller hardware size. The power consumption is smaller then 1[mW] at stand by period with supply voltage of 3.6[V] and maximum energy conversion efficiency is about 86[%]. This device has been designed in a 0.6[um] double poly, double metal 40[V] CMOS process and whole chip size is 2100*2000 [um2].

• Proceedings of the KIEE Conference
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• 2003.10b
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• pp.187-189
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• 2003

Conventional Switched Mode Power Supplies(SMPS) with diode-capacitor rectifier have distorted input current waveform with high harmonic content. Typically, these SMPS have a power factor lower than 0,65. To improve with this problem the power factor correction(PFC) circuit of power supplies has to be introduced. Specially. to the reduce size and manufacture cost of power conversion device, the single-stage PFC converter is increased to demand as necessary of study. in this paper, The comparative analysis of power factor correction circuit using Feedforward control with average current mode flyback converter(single-stage) and boost converter(two-stage). Also, the validity of designed and manufactured high power factor flyback converter and boost converter is confirmed by simulation and experimental results.