• Title/Summary/Keyword: microelectronic substrate

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Via Filling in Fine Pitched Blind Via Hole of Microelectronic Substrate (마이크로 전자기판의 미세 피치 블라인드 비아홀의 충진 거동)

  • Yi Min-Su;Lee Hyo-S.
    • Journal of the Microelectronics and Packaging Society
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    • v.13 no.1 s.38
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    • pp.43-49
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    • 2006
  • The properties, behavior and reliability of the residual void in blind via hole(BVH) were carried out for the shape of BVH using the void extraction process. The residual void was perfectly removed in the specimens applied by the void extraction process, which was improved by 40% rather than the conventional process. The residual void in BVH was to be eliminated under a condition of 1.5 atm for more 30 sec with regardless of the shape of BVH. It was also observed that the residual void in BVH was not formed after the reliability test with JEDEC standard.

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A Study on Fluxless Soldering using Solder Foil (솔더 포일을 이용한 무플럭스 솔더링에 관한 연구)

  • 신영의;김경섭
    • Journal of Welding and Joining
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    • v.16 no.5
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    • pp.100-107
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    • 1998
  • This paper describes fluxless soldering of reflow soldering process using solder foil instead of solder pastes. There is an increasing demand for the reliable solder connection in the recent high density microelectronic components technologies. And also, it is problem fracture of an Ozone layer due to freon as which is used to removal of remained flux on the substrate. This paper discussed joining phenomena, boudability and joining processes of microelectronics devices, such as between outer lead of VLSI package and copper pad on a substrate without flux. The shear strength of joints is 8 to 13 N using Sn/Pb (63/37 wt.%) solder foil with optimum joining conditions, meanwhile, in case of using Sn/In (52/48 wt.%) solder foil, it is possible to bond with low heating temperature of 550 K, and accomplish to high bonding strength of 25N in condition heating temperature of 650K. Finally, this paper experimentally shows fluxless soldering using solder foil, and accomplishes key technology of microsoldering processes.

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Adhesion of corddierite-copper (코디에라이트-구리 접합력)

  • Lim, N.H.;Yu, S.T.;Jang, M.H.;Park, S.J.;Han, B.S.
    • Proceedings of the KIEE Conference
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    • 1990.07a
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    • pp.211-214
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    • 1990
  • The cordierite(2 MgO, $2Al_2O_3$, $5SiO_2$) is of great interest for microelectronic substrate of multilayer intergrated circuits. The metal used in this study was copper, and metal layer is fabricatedon the cordierite substrate by the screen printing method. We studied the adhesion properties of the interfaces due to the different cosintering conditions. When cosintering in the $Ar+H_2O$ gas, the adhesion is very good. Specially heating rate is very important factor for the adhesion.

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Modeling on Hydrogen Effects for Surface Segregation of Ge Atoms during Chemical Vapor Deposition of Si on Si/Ge Substrates

  • Yoo, Kee-Youn;Yoon, Hyunsik
    • Korean Chemical Engineering Research
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    • v.55 no.2
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    • pp.275-278
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    • 2017
  • Heterogeneous semiconductor composites have been widely used to establish high-performance microelectronic or optoelectronic devices. During a deposition of silicon atoms on silicon/germanium compound surfaces, germanium (Ge) atoms are segregated from the substrate to the surface and are mixed in incoming a silicon layer. To suppress Ge segregation to obtain the interface sharpness between silicon layers and silicon/germanium composite layers, approaches have used silicon hydride gas species. The hydrogen atoms can play a role of inhibitors of silicon/germanium exchange. However, there are few kinetic models to explain the hydrogen effects. We propose using segregation probability which is affected by hydrogen atoms covering substrate surfaces. We derived the model to predict the segregation probability as well as the profile of Ge fraction through layers by using chemical reactions during silicon deposition.

Combinatorial Solid Phase Peptide Synthesis and Bioassays

  • Shin, Dong-Sik;Kim, Do-Hyun;Chung, Woo-Jae;Lee, Yoon-Sik
    • BMB Reports
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    • v.38 no.5
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    • pp.517-525
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    • 2005
  • Solid phase peptide synthesis method, which was introduced by Merrifield in 1963, has spawned the concept of combinatorial chemistry. In this review, we summarize the present technologies of solid phase peptide synthesis (SPPS) that are related to combinatorial chemistry. The conventional methods of peptide library synthesis on polymer support are parallel synthesis, split and mix synthesis and reagent mixture synthesis. Combining surface chemistry with the recent technology of microelectronic semiconductor fabrication system, the peptide microarray synthesis methods on a planar solid support are developed, which leads to spatially addressable peptide library. There are two kinds of peptide microarray synthesis methodologies: pre-synthesized peptide immobilization onto a glass or membrane substrate and in situ peptide synthesis by a photolithography or the SPOT method. This review also discusses the application of peptide libraries for high-throughput bioassays, for example, peptide ligand screening for antibody or cell signaling, enzyme substrate and inhibitor screening as well as other applications.

Recent Technical Trend and Properties on Raw Materials of Substrates for Microelectronic Packages (마이크로 전자패키지용 Substrates 원자재에 대한 기술동향 및 특성)

  • 이규제;이효수;이근희
    • Journal of the Microelectronics and Packaging Society
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    • v.10 no.3
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    • pp.43-55
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    • 2003
  • As the development of If industries and their electronic device manufacturing technology have been accelerated recently, the request for electronic devices with small size, light weight, and high performance has been inducing that electronic package and substrate (PCB) companies have to develop substrates with low cost, high dense I/O, excellent thermal properties and electrical properties. Therefore, world-wide chip makers have been setting their own severe reliability standards and requiring their suppliers to keep specification and to develop green, high frequency and high-performing substrates. Because properties of substrates are dependent mainly on their constituent materials, the application of them showing superior properties is expected to satisfy the customer's requirement. Therefore, substrate companies should ensure the superiority of materials and assure their competitive capability of substrates by analyzing the latest trends of technology and properties of the materials.

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Lead-free Solder Alloys (무연솔더합금)

  • 이호영
    • Journal of the Korean institute of surface engineering
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    • v.35 no.4
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    • pp.218-231
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    • 2002
  • As the environmental regulation worldwide emerges, most notably in Europe and Japan, the elimination of Pb usage in electronic assemblies has been an important issue for microelectronics assembly due to the inherent toxicity of Pb. This has provided an impetus towards the development of Pb-free solders. A major factor affecting alloy selection is the melting point, since this will have a major impact on the other polymeric materials used in microelectronic assembly and encapsulation. Other important manufacturing issues are cost, availability, and wetting characteristics. Reliability related properties include mechanical strength, fatigue resistance, coefficient of thermal expansion and reactivity with substrate. In this article, Pb-free solder alloys have been proposed so far have been reviewed and are summarized.

Influence of Surface Texturing on the Electrical and Optical Properties of Aluminum Doped Zinc Oxide Thin Films

  • Lee, Jaeh-Yeong;Shim, Joong-Pyo;Jung, Hak-Kee
    • Journal of information and communication convergence engineering
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    • v.9 no.4
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    • pp.461-465
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    • 2011
  • An aluminum doped zinc oxide (AZO) film for front contacts of thin film solar cells, in this work, were deposited by r.f. magnetron sputtering, and then etched in diluted hydrochloric acid solution for different times. Effects of surface texturing on the electro-optical properties of AZO films were investigated. Also, to clarify the light trapping of textured AZO film, amorphous silicon thin film solar cells were fabricated on the textured AZO/glass substrate and the performance of solar cells were studied. After texturing, the spectral haze at the visible range of 400 ~750 nm increased substantially with the etching time, without a change in the resistivity. The conversion efficiency of amorphous Si solar cells with textured AZO film as a front electrode was improved by the increase of short-circuit current density ($J_{sc}$), compared to cell with flat AZO films.

The surface propery change of multi-layer thin film on ceramic substrate by ion beam sputtering (이온빔 스퍼터링법에 의한 다층막의 표면특성변화)

  • Lee, Chan-Young;Lee, Jae-Sang
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.11a
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    • pp.259-259
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    • 2008
  • The LTCC (Low Temperature Co-fired Ceramic) technology meets the requirements for high quality microelectronic devices and microsystems application due to a very good electrical and mechanical properties, high reliability and stability as well as possibility of making integrated three dimensional microstructures. The wet process, which has been applied to the etching of the metallic thin film on the ceramic substrate, has multi process steps such as lithography and development and uses very toxic chemicals arising the environmental problems. The other side, Plasma technology like ion beam sputtering is clean process including surface cleaning and treatment, sputtering and etching of semiconductor devices, and environmental cleanup. In this study, metallic multilayer pattern was fabricated by the ion beam etching of Ti/Pd/Cu without the lithography. In the experiment, Alumina and LTCC were used as the substrate and Ti/Pd/Cu metallic multilayer was deposited by the DC-magnetron sputtering system. After the formation of Cu/Ni/Au multilayer pattern made by the photolithography and electroplating process, the Ti/Pd/Cu multilayer was dry-etched by using the low energy-high current ion-beam etching process. Because the electroplated Au layer was the masking barrier of the etching of Ti/Pd/Cu multilayer, the additional lithography was not necessary for the etching process. Xenon ion beam which having the high sputtering yield was irradiated and was used with various ion energy and current. The metallic pattern after the etching was optically examined and analyzed. The rate and phenomenon of the etching on each metallic layer were investigated with the diverse process condition such as ion-beam acceleration energy, current density, and etching time.

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Measurement of Flexural Modulus of Lamination Layers on Flexible Substrates (유연 기판 위 적층 필름의 굽힘 탄성계수 측정)

  • Lee, Tae-Ik;Kim, Cheolgyu;Kim, Min Sung;Kim, Taek-Soo
    • Journal of the Microelectronics and Packaging Society
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    • v.23 no.3
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    • pp.63-67
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    • 2016
  • In this paper, we present an indirect method of elastic modulus measurement for various lamination layers formed on polymer-based compliant substrates. Although the elastic modulus of every component is crucial for mechanically reliable microelectronic devices, it is difficult to accurately measure the film properties because the lamination layers are hardly detached from the substrate. In order to resolve the problem, 3-point bending test is conducted with a film-substrate specimen and area transformation rule is applied to the cross-sectional area of the film region. With known substrate modulus, a modulus ratio between the film and the substrate is calculated using bending stiffness of the multilayered specimen obtained from the 3-point bending test. This method is verified using electroplated copper specimens with two types of film-substrate structure; double-sided film and single sided film. Also, common dielectric layers, prepreg (PPG) and dry film solder resist (DF SR), are measured with the double-sided specimen type. The results of copper (110.3 GPa), PPG (22.3 GPa), DF SR (5.0 GPa) were measured with high precision.