• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.2
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• pp.179-184
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• 2016

In recent years, the on-resistance, power loss and cell density of Si power devices have not exhibited significant improvements, and performance is approaching the material limits. GaN is considered an attractive material for future high-power applications because of the wide band-gap, large breakdown field, high electron mobility, high switching speed and low on-resistance. Here we report on the Ohmic contact resistance and reverse-bias characteristics of AlGaN/GaN Schottky barrier diodes with and without annealing. Annealing in oxygen at $500^{\circ}C$ resulted in an increase in the breakdown voltage from 641 to 1,172 V for devices with an anode-cathode separation of $20{\mu}m$. However, these annealing conditions also resulted in an increase in the contact resistance of $0.183{\Omega}-mm$, which is attributed to oxidation of the metal contacts. Auger electron spectroscopy revealed diffusion of oxygen and Au into the AlGaN and GaN layers following annealing. The improved reverse-bias characteristics following annealing in oxygen are attributed to passivation of dangling bonds and plasma damage due to interactions between oxygen and GaN/AlGaN. Thermal annealing is therefore useful during the fabrication of high-voltage GaN devices, but the effects on the Ohmic contact resistance should be considered.

• Journal of the Korean Society for Precision Engineering
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• v.17 no.4
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• pp.106-113
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• 2000

One of the recent changes in machining technology is rapid application of micro- and high precision grinding processes. A fine groove generation is necessary for the fabrication of optics, electronics and semiconductor parts. Slot grinding is very efficient for the generation of micro ordered groove with hard and brittle materials. In the process of slot grinding, chipping at the sharp edges and microcracks of the ground grooves are inevitable defects. Chipping should be reduced for the improvement of surface integrity. Mechanical contact with diamond grits causes microcracks at the grooves. This damage resides subsurface, and can be the cause of failure of the punch die. This paper deals with chipping generation at the sharp edges, surface integrity of side groove and fracture strength is related to the microcracks in the slot grinding.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2003.11a
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• pp.251-255
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• 2003

탄화규소 반도체에 대한 오옴성 금속 접촉 성질을 조사하기 위해 3종류의 금속 (Ni, Co, Cu)을 세척한 탄화규소 반도체 위에 직접 증착하여 전기적 성질을 조사 비교하였다. 이들 금속에 대한 오옴성 성질은 금속종류 뿐만 아니라 열처리조건에 대해서도 크게 좌우됨을 알 수 있었다. 열처리는 급속열처리 장치를 이용한 진공상태 및 환원 분위기에서 2-step 방법으로 시행하였다. 접합비 저항은 TLM 구조를 만들었으며 면저항$(R_s)$, 접촉저항$(R_c)$, 이동거리$(L_T)$, 패드간거리(d), 저항$(R_T)$ 값을 구하면 접합비저항$(\rho_c)$ 값을 구하여 알려진 계산식에 의해 추정하였다. 가장 양호한 결과는 Cu 금속에 의한 접촉 결과이었으며 접합비저항$(\rho_c)$은 $1.2\times10^{-6}{\Omega}cm^2$의 낮은 값을 얻을 수 있었다. 열처리는 진공보다 환원분위기에서 수행한 시편이 양호한 전기적 성질을 가짐을 알 수 있었다.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08a
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• pp.730-732
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• 2007

We fabricated a coplanar type organic thin-film transistors using ink-jet printed silver source/drain electrodes and ${\alpha},{\omega}-dihexylquaterthiophene$ (DH4T) which is an active layer. Use of ink-jet printed silver nanoparticle-based metal electrode assists the energetic mismatch with p-type organic semiconductor via modification of their interfacial properties to enable ohmic contact formation.

• Proceeding of EDISON Challenge
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• 2016.03a
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• pp.299-304
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• 2016

2차원 반도체 소재의 경우 물질종류마다 내포하고 있는 고유결함에 의해서 Fermi-Level Pinning 이 발생하여 이로 인한 Schottky Barrier transistor로 동작을 하게 되며, 이는 접합부에 Carrier Injection 정도와 Schottky Barrier을 통과하는 Tunneling 정도에 의해서 소자의 특성이 결정 된다. 본 연구에서는 시뮬레이션을 통하여 2차원 반도체인 $MoS_2$소자를 설계하고, S/D Doping에 따라 접촉 저항 개선 효과와 소자의 동작특성이 어떠한 영향을 미치는지 연구하여 최대 $250cm^2/V{\cdot}sec$의 field effect mobility 의 결과를 얻었다. 또한 S/D doping 에 따라 각 저항 성분의 영향을 분석하였으며 면저항 및 접촉 저항 둘 다 doping 농도가 증가함에 따라 감소하는 결과를 나타내며, S/D doping의 영향은 접촉저항에서 더 크게 나타났다. 더불어 2차원 반도체의 Resistance network model 을 제안하여 subthreshold 영역에서는 $R_{ic}$, saturation 영역에서는 $R_{ish}$ 가 전체저항에서 주요한 변수로 전체저항식에 포함되어야 한다는 것을 시뮬레이션을 통해서 검증하였다.

• Proceeding of EDISON Challenge
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• 2016.03a
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• pp.285-287
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• 2016

이황화 몰리브덴(Molybdenum disulfide: $MoS_2$)을 채널(Channel) 물질로 이용하여 metal-oxide-semiconductor(MOS) 구조를 제작하고, 효율적인 제작과정을 제시하였고 특히, Source/Drain의 Doping concentration을 조절하여 효과적인 $MoS_2$ Transistor를 제작 및 시뮬레이션 하였다. 그 후 여러 MOSFET의 특성 분석을 통하여 소자로서의 기능을 확인해보았다. 그리고 특히 채널의 전기적인 특성을 분석하고 채널 내 그리고 contact 사이의 저항 및 mobility의 특성을 알아보았는데, 그 중 Source/Drain Doping Effect와 performance 분석을 통해, 최적화된 $MoS_2$ Transistor를 찾아보았다.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.12
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• pp.56-63
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• 1994

The effects of sulfur treatments on the barrier heithts of Schottky contacts and the interface-state density of metal-insulator-semiconductor (MIS) capacitors on InP have been investigated. Schottky contacts were formed by the evaporation of Al, Au, and Pt on n-InP substrate before and after (NH$_{4}$)$_{2}$S$_{x}$ treatments, respectively. The barrier height of InP Schottky contacts was measured by their current-voltage (I-V) and capacitance-voltage (C_V) characteristics. We observed that the barrier heights of Schottky contacks on bare InP were 0.35~0.45 eV nearly independent of the metal work function, which is known to be due to the surface Fermi level pinning. In the case of sulfur-treated Au/InP ar Pt/InP Schottky diodes, However, the barrier heights were not only increased above 0.7 eV but also highly dependent on the metal work function. We have also investigated effects of (NH$_{4}$)$_{2}$S$_{x}$ treatments on the distribution of interface states in Si$_{3}$N$_{4}$InP MIS diodes where Si$_{3}$N$_{4}$ was provided by plasma enhanced chemical vapor deposition (PECVD). The typical value of interface-state density extracted feom 1 MHz C-V curve of sulfur-treated SiN$_{x}$/InP MIS diodes was found to be the order of 5${\times}10^{10}cm^{2}eV^{1}$. This value is much lower than that of MiS diodes made on bare InP surface. It is certain, therefore, that the (NH$_{4}$)$_{2}$S$_{x}$ treatment is a very powerful tool to enhance the barrier heights of Au/n-InP and Pt/n-InP Schottky contacts and to reduce the density of interface states in SiN$_{x}$/InP MIS diode.

• Korean Journal of Materials Research
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• v.1 no.1
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• pp.17-22
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• 1991

Tantalum thin films were deposited by DC sputtering on heavily doped single Si substrates. These substrates were treated by means of a rapid thermal annealing (RTA) under Ar atmosphere for various temperatures($600-1100^{\circ}C$). The silicide formation and the impurities behavior in the substrate are studied by means of XRD, SEM, four-point probe, HP4145, and SIMS. The formation of $TaSi_2$ started at $800^{\circ}C$ for all kinds of impurities and the entire Tantalum thin metal films were transformed into $TaSi_2$ above $1000^{\circ}C$ Also the contact resistance for $TaSi_2/P^+$ region had a low value; $22{\Omega}$, at contact site of $0.9{\times}0.9(\mu\textrm{m^2}$), and implanted impurities were diffused out into the $TaSi_2$ for rapid thermal annealing.

• Journal of the Korean Vacuum Society
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• v.17 no.6
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• pp.518-522
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• 2008

The miniaturization of device size and multilevel interlayers have been developed by ULSI circuit devices. These submicron processes cause serious problems in conventional metallization due to the solubility of silicon and metal at the interface, such as an increasing contact resistance in the contact hole and interdiffusion between metal and silicon. Therefore it is necessary to implement a barrier layer between Si and metal. Thus, the size of multilevel interconnection of ULSI devices is critical metallization schemes, and it is necessary reduce the RC time delay for device speed performance. So it is tendency to study the Cu metallization for interconnect of semiconductor processes. However, at the submicron process the interaction between Si and Cu is so strong and detrimental to the electrical performance of Si even at temperatures below $200^{\circ}C$. Thus, we suggest the tungsten-carbon-nitrogen (W-C-N) thin film for Cu diffusion barrier characterized by nano scale indentation system. Nano-indentation system was proposed as an in-situ and nanometer-order local stress analysis technique.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.132-132
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• 2011

For the programming volume of PRAM, Ge2Sb2Te5(GST) thin films have been dominantly used and prepared by physical vapor deposition (PVD), chemical vapor deposition (CVD), atomic layer deposition (ALD). Among these methods, ALD is particularly considered as the most promising technique for the integration of PRAM because the ALD offers a superior conformality to PVD and CVD methods and a digital thickness control precisely to the atomic level since the film is deposited one atomic layer at a time. Meanwhile, although the IST has been already known as an optical data storage material, recently, it is known that the IST benefits multistate switching behavior, meaning that the IST-PRAM can be used for mutli-level coding, which is quite different and unique performance compared with the GST-PRAM. Therefore, it is necessary to investigate a possibility of the IST materials for the application of PRAM. So far there are many attempts to deposit the IST with MOCVD and PVD. However, it has not been reported that the IST can be deposited with the ALD method since the ALD reaction mechanism of metal organic precursors and the deposition parameters related with the ALD window are rarely known. Therefore, the main aim of this work is to demonstrate the ALD process for IST films with various precursors and the conformal filling of a nano size programming volume structure with the ALD?IST film for the integration. InSbTe (IST) thin films were deposited by ALD method with different precursors and deposition parameters and demonstrated conformal filling of the nano size programmable volume of cell structure for the integration of phase change random access memory (PRAM). The deposition rate and incubation time are 1.98 A/cycle and 25 cycle, respectively. The complete filling of nano size volume will be useful to fabricate the bottom contact type PRAM.