• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.4C
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• pp.310-317
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• 2006

In this paper, we propose a new sequential message-passing decoding algorithm of low-density parity-check (LDPC) codes by partitioning check nodes. This new decoding algorithm shows better bit error rate(BER) performance than that of the conventional message-passing decoding algorithm, especially for small number of iterations. Analytical results tell us that as the number of partitioned subsets of check nodes increases, the BER performance becomes better. We also derive the recursive equations for mean values of messages at variable nodes by using density evolution with Gaussian approximation. Simulation results also confirm the analytical results.

• Journal of KIISE:Computer Systems and Theory
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• v.31 no.5_6
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• pp.347-352
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• 2004

This thesis deals with a task scheduling on a message-passing system. Scheduling and allocation are very important issues since the inappropriate scheduling of tasks cannot exploit the true potential of the system and it can offset the grain from parallelization. It is difficult to apply previous schemes to message-passing system, because previous schemes assume the shared memory system. This thesis proposes an modified priority function and processor selection technique that consider the problems caused by the difference between previous models and message-passing environments. The priority function includes the cumulative communication cost which causes task execution to be delayed. The processor selection technique avoids the situation that a child task is assigned to the same Processor allocated to its parent task that has other unscheduled child tasks. We showed by some simulations that our modified features of task scheduling algorithm can make the better scheduling results than the previous algorithms.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2000.11a
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• pp.484-488
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• 2000

병렬 컴퓨터를 사용하는 경우 하드웨어만으로 모든 것이 해결되지 않으며 병렬처리 기법의 도입이 불가피하다. 효과를 극대화하기 위하여서는 각 병렬 컴퓨터의 하드웨어적인 특징을 극대화할 수 있는 병렬 알고리즘과 병렬 프로그램 등 소프트웨어 개발이 필수적이다. GMRES(Generalized Minimal residual) 방법은 아주 큰 대칭 또는 비대칭 선형시스템의 해를 구하는 반복법 중의 하나로 일반적으로 많이 사용되고 있다. 서로 직교인 벡터를 하나씩 구하는 대신에 선형인 s개의 벡터를 구하고 각 그룹간에는 직교가 되게하는 s-step GMRES 알고리즘은 병렬적 성질을 더 많이 가지고 있다. 이 병렬 알고리즘의 전반부는 이미 개발된 s-step Arnoldi 알고리즘을 이용할 수 있다. s-step GMRES 알고리즘은 message passing 병렬 시스템에서 모든 프로세서들 사이의 자료 교환 시간을 줄임으로써 기존의 GMRES 방법에 비해 훨씬 더 병렬성을 증가시킨다. 본 논문에서는 초병렬 시스템(MPP)인 Cray T3E에서 많은 프로세서를 이용할 경우 개발된 s-step 알고리즘이 기존의 알고리즘에 비하여 얼마나 더 효과적으로 빨리 수행될 수 있는지 분석한다.

• Journal of KIISE:Computer Systems and Theory
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• v.31 no.7
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• pp.379-386
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• 2004

We designed a portable parallel library HPCL(High Performance Computing Library) with following objectives: (1) to provide a close relationship between the parallel code and the original sequential code that will help future versions of the sequential code and (2) to enhance performance of the parallel code. The library is an interface written in C and Fortran programming languages between MPI(Message Passing Interface) and parallel programs in Fortran. Performance results were determined on clusters of PC's and IBM SP4.

• Journal of Satellite, Information and Communications
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• v.8 no.4
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• pp.130-134
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• 2013

This paper describes the basic principles of 3D broadcast system and proposes new 3D broadcast technology that reduce the amount of data by applying CS(Compressed Sensing). Differences between Sampling theory and the CS technology concept was described. Recently proposed CS algorithm AMP(Approximate Message Passing) and CoSaMP(Compressive Sampling Matched Pursuit) was described. Image data that compressed and restored by these algorithm was compared. Calculation time of the algorithm having a low complexity is determined.

• Journal of Satellite, Information and Communications
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• v.10 no.3
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• pp.57-61
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• 2015

This paper describes the basic principles of 3D broadcast system and proposes new 3D broadcast technology that reduces the amount of data by applying CS(Compressed Sensing). Differences between Sampling theory and the CS technology concept was described. CS algorithm SS-CoSaMP(Single-Space Compressive Sampling Matched Pursuit) and AMP(Approximate Message Passing) was described. Image data compressed and restored by these algorithm was compared. Calculation time of the algorithm having a low complexity is determined.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.40 no.8
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• pp.1518-1520
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• 2015

This letter considers a problem of associating users to small-cell base stations (sBSs) and selecting a set of operating sBSs in a small-cell network to minimize the power consumption. We derive a message passing algorithm to obtain a solution distributively. Simulation results show that the proposed algorithm is superior to the conventional schemes.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.1B
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• pp.86-92
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• 2011

In this paper, we propose a novel hardware MPI(Message Passing Interface) unit which supports message passing in multiprocessor system which use distributed memory architecture. MPI Hardware unit processes data synchronization, transmission and completion, and it supports processor non-blocking operation so it reduces overhead according to synchronization. Additionally, MPI hardware unit combines ready entry, request entry, reserve entry which save and manage the synchronized messages and performs the multiple outstanding issue and out of order completion. According to BFM(Bus Functional Model) simulation result, the performance is increased by 25% on many to many communication. After we designed MPI unit using HDL, with synopsys design compiler we synthesized, and for synthesis library we used MagnaChip $0.18{\mu}m$. And then we making prototype chip. The proposed message transmission interface hardware shows high performance for its increase in size. Thus, as we consider low-cost design and scalability, MPI hardware unit is useful in increasing overall performance of embedded MPSoC(Multi-Processor System-on-Chip).

• 제어로봇시스템학회:학술대회논문집
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• 2002.10a
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• pp.94.1-94
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• 2002

This paper is concerned with parallel FFT and Quick-Merge Sort. They are implemented on computers interconnected by VMIC 5579 reflective memory and a cluster of workstations (PCs) interconnected via Fast Ethernet. Message passing interface (MPI) parallel library is used for communication in a cluster of workstations. An improved parallel FFT is also presented to decrease an execution time in the case of a small number of hosts. Distributed shared memory (DSM), VMIC 5579 reflective memory (RM), a cluster of workstations (COW) and message passing interface (MPI) parallel library are described.

• Ocean and Polar Research
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• v.23 no.2
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• pp.173-179
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• 2001

Parallel supercomputing is now a must for oceanographic numerical modelers. Most of today's parallel numerical schemes use synchronous algorithms, where some processors that have finished their tasks earlier than others must wait at synchronization points for correct computation. Hence, the load balancing is a crucial factor, however, it is, in general, difficult to achieve on heterogeneous workstation clusters. We devise an asynchronous algorithm that reduces the idle times of faster processors, and discuss application of the algorithm to some grid problems and implementation on a workstation cluster using Message Passing Interface (MPI).