1 |
P. Francesco, P. Marchal, D. Atienza, L. Benini, and F. Catthoor, "An integrated hardware/software approach for run-time scratchpad management," Proceedings of the 41st annual Design Automation Conference, San Diego, CA, USA, pp. 238-243, June 2004
|
2 |
AMBA AXI Specification, ARM Limited 2003.
|
3 |
L. Benini and G.de Micheli, " Networks On Chip: A New SoC Paradigm," IEEE Computer, Vol.35, No.1, pp.70-78, Jan. 2002
DOI
ScienceOn
|
4 |
P. Stenstrom, "A Survey of Cache Coherence Schemes for Multiprocessors," Computer, Vol. 23, pp.12-24, June 1990.
|
5 |
S. Han, A. Baghdadi, M. Bonaciu, S. Chae, and A. A. Jerraya, "An efficient scalable and flexible data transfer architecture for multiprocessor SoC with massive distributed memory," Proceedings of the 41st annual Design Automation Conference, San Diego, CA, USA, pp.250-255, June 2004.
|
6 |
A. C. Klaiber, H. M. Levy, "A comparison of message passing and shared memory architectures for data parallel programs," Proceedings of the 21st annual international symposium on Computer architecture, Vol.22, pp.94-105, April 1994
DOI
ScienceOn
|