• 대한전기학회:학술대회논문집
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• 대한전기학회 1988년도 전기.전자공학 학술대회 논문집
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• pp.247-249
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• 1988

The most space-consuming element of digital image processing system is the video memory. Though this problem is solved by DRAMs, timing constraints posed by video data rates. The cycle time of DRAMs can be diminished by serial transferring and reading or writing pixel datas at the same time. This paper resents the design of 1024${\times}$512 video memory using this technique.

• ETRI Journal
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• 제29권1호
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• pp.124-126
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• 2007

In this letter, we study the impact of single event upsets (SEUs) in space or defense electronic systems which use memory devices such as EEPROM, and SRAM. We built a microcontroller test board to measure the effects of protons on electronic devices at various radiation levels. We tested radiation hardening at beam current, and energy levels, measured the phenomenon of SEUs, and addressed possible reasons for SEUs.

• Bulletin of the Korean Chemical Society
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• 제12권4호
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• pp.423-429
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• 1991

Global and local memory functions, defined by Quack and Troe, were calculated for the rotationally inelastic collision of O + SO(v, j)→ [O--S--O]→O + SO(v, j'). It is seen to decrease steadily as total energy increases. Distribution of scattering cross section over product rotational states also shows the decreasing memory of initial state as total energy is increased. These results are interpreted in terms of energy scrambling at high energy due to the availability of more phase space and also the influence of strong dynamical constraints.

• 한국광학회:학술대회논문집
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• 한국광학회 1989년도 제4회 파동 및 레이저 학술발표회 4th Conference on Waves and lasers 논문집 - 한국광학회
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• pp.89-94
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• 1989

In this paper, we propose a hybrid optical/digital version of the associative memory which improve hardware efficiency and increase convergence rates. Multifocus hololens are used as space-varient optical element for performing inner product and summation function. The real-time input and the stored states of memory matrix is formated using LCTV. One method of adaptively changing the weights of stored vectors during each iteration is implemented electronically. A design for a optical implementation scheme is discussed and the proposed architecture is demonstrated the ability of retrieving with computer simmulation.

• 한국항공우주학회지
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• 제36권2호
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• pp.195-201
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• 2008

본 논문에서는 소형화, 경량화 및 저전력화를 목표로 개발된 과학기술위성 2호 대용량 메모리 유닛(Mass Memory Unit, MMU)의 준비행모델(Proto Flight Model, PFM)을 통해서 과학기술위성 1호 대용량 메모리 유닛과의 성능을 비교 하였다. 탑재체로부터의 수신 속도와 XTX로의 전송 속도는 각각 200Kbps와 10Mbps이다. 실험실에서의 성능시험과 위성에 조립된 상태에서의 성능 및 환경 시험을 통해서 그 성능을 확인 하였다.

• 한국항공우주학회지
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• 제37권12호
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• pp.1258-1263
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• 2009

본 논문에서는 개발된 과학기술위성3호 대용량 메모리 유닛의 검증모델의 성능 및 환경시험 결과를 나타내었다. 과학기술위성3호 대용량 메모리 유닛은 적외선 영상시스템(MIRIS)과 초소형 영상 분광기(COMIS)에서 최대 100Mbps로 수신한 데이터를 32Gb의 메모리에 저장한 후 지상으로 10Mbps의 속도로 전송하는 임무를 수행한다. 탑재체 데이터 수신 시험과 데이터 수신 시스템으로의 데이터 전송 시험을 통해서 성능을 검증 하였다. 또한 발사체 환경과 우주 환경에서의 성능 확인을 위해서 진동 시험과 열진공 시험을 수행 하였다.

• 한국정보처리학회논문지
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• 제7권4호
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• pp.1082-1091
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• 2000

In Distributed Shared Memory systems, false sharing occurs when two different data items, not shared but accessed by two different processors, are allocated to a single block and is an important factor in degrading system performance. The paper first analyzes shared memory allocation and reference patterns in parallel applications that allocate memory for shared data objects using a dynamic memory allocator. The shared objects are sequentially allocated and generally show different reference patterns. If the objects with the same size are requested successively as many times as the number of processors, each object is referenced by only a particular processor. If the objects with the same size are requested successively much more than the number of processors, two or more successive objects are referenced by only particular processors. On the basis of these analyses, we propose a memory allocation scheme which allocates each object requested by different processors to different pages and evaluate the existing memory allocation techniques for reducing false sharing faults. Our allocation scheme reduces a considerable amount of false sharing faults for some applications with a little additional memory space.

• 대한임베디드공학회논문지
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• 제9권4호
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• pp.205-210
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• 2014

Cache based live migration method utilizes a cache, which is accessible to both side (remote and local), to reduce the virtual machine migration time, by transferring only irredundant data. However, address space layout randomization (ASLR) is proved to reduce the memory duplicate ratio between targeted migration memory and the migration cache. In this pager, we analyzed the behavior of ASLR to find out how it changes the physical memory contents of virtual machines. We found that among six virtual memory regions, only the modification to stack influences the page-level memory duplicate ratio. Experiments showed that: (1) the ASLR does not shift the heap region in sub-page level; (2) the stack reduces the duplicate page size among VMs which performed input replay around 40MB, when ASLR was enabled; (3) the size of memory pages, which can be reconstructed from the fresh booted up state, also reduces by about 60MB by ASLR. With those observations, when applying cache-based migration method, we can omit the stack region. While for other five regions, even a coarse page-level redundancy data detecting method can figure out most of the duplicate memory contents.

• 한국정보과학회논문지:시스템및이론
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• 제33권9호
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• pp.615-625
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• 2006

최근 차세대 메모리 기술이 급격히 발전하여 FeRAM과 PRAM과 같은 비휘발성 메모리의 상품화가 진행 중이다. 이러한 차세대 비휘발성 메모리(NVRAM)는 메모리와 저장 장치의 속성을 모두 만족시켜 데이타를 영속적으로 저장할 뿐 아니라 빠른 데이타 임의 접근을 가능하게 한다. NVRAM에 자주 변경되는 객체를 영속적으로 저장하기 위해서는 네이밍, 회복, 그리고 공간 관리와 같은 파일 시스템의 핵심 기능이 모두 필요하다. 그렇지만 기존 파일 시스템과 최근에 개발된 NVRAM 용 파일 시스템 모두 공간 효율이 낮으며, 어떤 경우 50% 정도에 불과하다. 따라서 상대적으로 고가인 NVRAM을 활용하기 위하여 공간 효율성이 뛰어난 익스텐트(extent) 기반의 NEBFS (NVRAM Extent-Based File System) 파일 시스템을 설계하였다. 그리고 기존 파일 시스템과 NEBFS의 공간 효율성을 비교 분석하였으며, 아울러 NEBFS를 구현하고 NVRAM이 탑재된 보드 및 NVRAM 에뮬레이션 환경에서 공간 효율성을 측정하여 분석 결과를 검증하였다. 이러한 실험 결과는 NEBFS의 공간 효율이 기존 파일 시스템보다 우수함을 보여 준다.

• 대한임베디드공학회논문지
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• 제9권5호
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• pp.253-260
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• 2014

European Space Agency has recognized Integrated Modular Avionics and ARINC specification 653 as avionics computer system for space application. Integrated Modular Avionics specification reduces the space by integrating a system composed of many electronic devices into a computer. recent researches have been studying how to apply the ARINC 653 into an open source operating system, such as Linux. These studies have concentrated on partition scheduling for time separation. However, requirements to guarantee spatial separation should be further analyzed to ensure deterministic execution time. Therefore, memory management is needed to verify spatial isolation on Linux systems. This research proposes a new method to accomplish spatial isolation for the ARINC 653 specification in Linux. We have added new data structures and system calls to handle functionalities for spatial separation. They are used during the partition startup process. The proposed method was evaluated on the LEON4 processor, which is the next generation microprocessor to be used in the future space missions. All implementations confirm that spatial isolation of the ARINC 653 specification was accomplished.