• ETRI Journal
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• 제26권6호
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• pp.615-621
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• 2004

Next generation mobile communication system, such as IMT-2000, adopts Turbo codes due to their powerful error correction capability. This paper presents a block-wise maximum a posteriori (MAP) Turbo decoding structure with a low memory requirement. During this research, it has been observed that the training size and block size determine the amount of required memory and bit-error rate (BER) performance of the block-wise MAP decoder, and that comparable BER performance can be obtained with much shorter blocks when the training size is sufficient. Based on this observation, a new decoding structure is proposed and presented in this paper. The proposed block-wise decoder employs a decoding scheme for reducing the memory requirement by setting the training size to be N times the block size. The memory requirement for storing the branch and state metrics can be reduced 30% to 45%, and synthesis results show that the overall memory area can be reduced by 5.27% to 7.29%, when compared to previous MAP decoders. The decoder throughput can be maintained in the proposed scheme without degrading the BER performance.

• 한국초등과학교육학회지:초등과학교육
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• 제24권4호
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• pp.321-328
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• 2005

In this study the effects of science teaming with the level of inquiry requirement in elementary school science experiment instruction were investigated on cognitive domain. We assigned seventy-three students of the fifth grade into two groups according to the levels of inquiry requirement. After each instruction was implemented, the characteristics of the students' tearning science on cognitive domain were compared and analyzed with the levels of them. The higher level (HL) inquiry-required instruction was more effective in increasing and maintaining the memory on the science teaming than the lower level (LL). Especially, in the aspects of the experimental methods and taking cares which the students engage and perform actively rather than do passively, the memory scores of HL group were higher than those of LL. In addition, the memory scores and the degree of maintenance were higher among students who perceived the instruction as easy and interesting. In conclusion, the HL of instruction could stimulate the students to challenge the problems, thereby make them construct meaning actively and improve the amount and degree of maintenance of memory on science teaming.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권4호
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• pp.407-418
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• 2014

As the high-throughput requirement in the next generation communication system increases, it becomes essential to implement high-throughput SISO (Soft-Input Soft-Output) decoder with minimal hardware resources. In this paper, we present the comparison results between cascaded radix-4 ACS (Add-Compare-Select) and LUT (Look-Up Table)-based radix-4 ACS in terms of delay, area, and power consumption. The hardware overhead incurred from the retiming technique used for high speed radix-4 ACS operation is also analyzed. According to the various analysis results, high-throughput radix-4 SISO decoding architecture based on simple path metric recovery circuit is proposed to minimize the hardware resources. The proposed architecture is implemented in 65 nm CMOS process and memory requirement and power consumption can be reduced up to 78% and 32%, respectively, while achieving high-throughput requirement.

• 품질경영학회지
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• 제30권1호
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• pp.162-171
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• 2002

A practical algorithm of generating most probable states in decreasing order of probability, given the probability of each unit\`s state, is suggested for approximating reliability(performability) evaluation of a network with multistate(multimode) units. Method of approximating network reliability for a given measure with most probable states is illustrated with a numerical example. The proposed method in this paper is compared with the previous method regarding memory requirement. Our method has some advantages for computation and achieves improvement with regard to memory requirement for a certain condition judging from the computation experiment.

• 한국통신학회논문지
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• 제27권8A호
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• pp.814-821
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• 2002

SPIHT(set partitioning in hierarchical tree)는 제로트리 알고리즘 중 효율적이며 잘 알려져 있다. 그러나 높은 메모리 요구로 인해 하드웨어 구현에 큰 어려움을 가지고 있다. 본 논문에서는 저 메모리 사용과 빠른 제로트리 부호화 알고리즘을 제안한다. 메모리를 줄이고 빠른 코딩을 위한 방법으로 다음 3가지를 제안한다. 첫 번째, 리프팅(lifting)을 이용한 웨이블릿(wavelet) 변환은 기존의 필터뱅크 방식의 변환보다 저 메모리와 계산량의 감소를 가진다. 두 번째 방법은 웨이블릿 계수들을 블록으로 나누어 각각 부호화 한다. 여기서 블록은 제로트리 구조가 유지되는 STB(spatial tree-based block)이다. 마지막으로 Wheeler와 Pearlmandl 제안한 NLS(no list SPIHT)를 이용한 부호화이다. NLS의 효율성은 SPIHT와 거의 같으며 작고 고정된 메모리와 빠른 부호화 속도를 보여준다.

• 한국통신학회논문지
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• 제30권8B호
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• pp.541-548
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• 2005

인터넷에서의 통신량이 증가함에 따라서 라우터의 고속 패킷 처리가 요구되며 IP 주소검색 이 라우터의 성능에 커다란 영향을 미친다. 인덱스 방식의 테이블을 사용하는 이전의 하드웨어 기반 IP 주소 검색 방법은 라우팅 프리픽스의 희소 분포로 인해서 메모리를 효율적으로 사용하지 못하여 메모리 요구량을 줄이는 데에 한계가 있다. 본 논문에서는 이전 방식보다 적은 양의 메모리를 가지고도 같은 IP주소 검색 속도를 제공하는 집합연관 IP 주소 검색 방식을 제안한다. 제안된 방식은 NHA 엔트리에 프리픽스와 다음경로 정보를 함께 저장하며 목적지 IP 주소를 연관 집합의 8개의 엔트리와 동시에 비교하여 일치하는 프리픽스를 찾도록 한다. 제안된 방식의 메모리 요구량은 Lin의 방식에 비해서 반 이하로 감소하여 효율적인 하드웨어 기반 If 주소 검색방식임을 입증하였다.

• 한국멀티미디어학회논문지
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• 제16권11호
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• pp.1261-1271
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• 2013

Zoom tracking involves the automatic adjustment of the focus motor in response to the zoom motor movements for the purpose of keeping an object of interest in focus, and is typically achieved by moving the zoom and focus motors in a zoom lens module so as to follow the so-called "trace curve", which shows the in-focus motor positions versus the zoom motor positions for a specific object distance. Thus, one can simply implement zoom tracking by following the most closest trace curve after all the trace curve data are stored in memory. However, this approach is often prohibitive in practical implementation because of its large memory requirement. Many other zoom tracking methods such as GZT, AZT and etc. have been proposed to avoid large memory requirement but with a deteriorated performance. In this paper, we propose a new zoom tracking method called 'Approximate Feedback Zoom Tracking method (AFZT)' on DM36x-based IP network camera, which does not need large memory by approximating nearby trace curves, but generates better zoom tracking accuracy than GZT or AZT by utilizing focus value as feedback information. Experiments through real implementation shows the proposed zoom tracking method improves the tracking performance and works in real-time.

• ETRI Journal
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• 제35권1호
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• pp.154-157
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• 2013

This letter proposes a memory-based parallel string matching engine using the compressed state transitions. In the finite-state machines of each string matcher, the pointers for representing the existence of state transitions are compressed. In addition, the bit fields for storing state transitions can be shared. Therefore, the total memory requirement can be minimized by reducing the memory size for storing state transitions.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1999년도 추계종합학술대회 논문집
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• pp.360-363
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• 1999

Video data compression is a major key technology in the field of multimedia applications. Variable-length coding is the most popular data compression technique which has been used in many data compression standards, such as JPEG, MPEG and image data compression standards, etc. In this paper, we present memory efficient VLC decoder architecture for MPEG-2 application which can achieve small memory space and higher throughput. To reduce the memory size, we propose a new grouping, remainder generation method and merged lookup table (LUT) for variable length decoders (VLD's). In the MPEG-2, the discrete cosine transform (DCT) coefficient table zero and one are mapped onto one memory whose space requirement has been minimized by using efficient memory mapping strategy The proposed memory size is only 256 words in spite of mapping two DCT coefficient tables.

• International Journal of Internet, Broadcasting and Communication
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• 제15권1호
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• pp.79-84
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• 2023

Due to the rapid performance improvement of smartphones, multitasking on mobile platforms has become an essential feature. Unlike traditional desktop or server environments, mobile applications are mostly interactive jobs where response time is important, and some applications are classified as real-time jobs with deadlines. When interactive and real-time jobs run concurrently, memory allocation between multitasking applications is a challenging issue as they have different time requirements. In this paper, we study how to allocate memory space when real-time and interactive jobs are simultaneously executed in a smartphone to meet the multitasking requirements between heterogeneous jobs. Specifically, we analyze the memory size required to satisfy the constraints of real-time jobs and present a new model for allocating memory space between heterogeneous multitasking jobs. Trace-driven simulations show that the proposed model provides reasonable performance for interactive jobs while guaranteeing the requirement of real-time jobs.