• 한국산학기술학회논문지
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• 제4권4호
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• pp.372-379
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• 2003

Desktop-PC의 메모리 모듈 제품을 대상으로 실장 검사를 하는데 있어 발생하는 문제점인 메인보드 메모리 연결부의 파손을 보완하기 위해 확장 카드를 개발하였다. 확장 카드 개발 전 메인보드 연결부의 파손은 하루 15％의 수준으로 잉여설비를 15％이상 확보해야 하며 수리를 전담으로 하는 인력을 필요로 하는 문제점을 가지고 있다. 확장카드의 개발로 소켓의 파손에 따른 업무 지연과 잉여설비의 capacity향상 및 작업성 개선을 통해 연간 7,800만원의 비용을 절감 할 수 있었다.

• 전자공학회논문지
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• 제50권2호
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• pp.114-121
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• 2013

Systems-On-Chips(SoC)에서 내장 메모리가 차지하는 비중은 비약적으로 증가하여 전체 트랜지스터 수의 80%~90%를 차지하고 있어, SoC에서 내장된 메모리에 대한 테스트 중요성이 증가하고 있다. 본 논문은 다양한 테스트 알고리즘을 지원하는 IEEE 1500 래퍼 기반의 프로그램 가능한 메모리 내장 자체 테스트(PMBIST) 구조를 제안한다. 제안하는 PMBIST는 March 알고리즘 및 Walking, Galloping과 같은 non-March 알고리즘을 지원하여 높은 flexibility, programmability 및 고장 검출률을 보장한다. PMBIST는 최적화된 프로그램 명령어와 작은 프로그램 메모리에 의해 최적의 하드웨어 오버헤드를 가진다. 또한 제안된 고장 정보 처리 기술은 수리와 고장 진단을 위해 2개의 진단 방법을 효과적으로 지원하여 메모리의 수율 향상을 보장한다.

• 한국IT서비스학회지
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• 제13권3호
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• pp.275-298
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• 2014

The purpose of this study is to verify the difference between the importance level and the satisfaction level of each purchase decision factor of smart phone. Through review of literatures about purchase decision factors, we have derived about attributes of 6 factors. T-test, importance performance analysis (IPA), and regression analysis were conducted to identify priorities among the details of the importance and satisfaction and to analyze the effect relationship between satisfaction of each factor and overall satisfaction. Looking at a few high-priority order, battery capacity, memory capacity, fast and accurate repair, the adequacy of the repair cost, and processor in the top five factors were shown to be an important factor when purchasing smart phones. The results of this study can provide the marketing strategies for smart phone suppliers. In addition, these results imply what factors of smart phones should be more considered before launching into chinese smart phone market.

• The Journal of the Acoustical Society of Korea
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• 제20권1E호
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• pp.14-19
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• 2001

We have proposed BIST method and circuit for embedded 16M SDRAM with logic. It can test the AC parameter of embedded 16M SDRAM using the BIST circuit capable of detecting the address of a fail cell installed in an Merged Memory with Logic(MML). It generates the information of repair for redundancy circuit. The function and AC parameter of the embedded memory can also be tested using the proposed BIST method. It is possible to test the embedded SDRAM without external test pin. The total gate of the BIST circuit is approximately 4,500 in the case of synthesizing by 0.25μm cell library and is verified by Verilog simulation. The test time of each one AC parameter is about 200ms using 2Y-March 14n algorithm.

• Molecules and Cells
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• 제37권11호
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• pp.767-776
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• 2014

Alzheimer's disease (AD) is clinically characterized with progressive memory loss and cognitive decline. Synaptic dysfunction is an early pathological feature that occurs prior to neurodegeneration and memory dysfunction. Mounting evidence suggests that aggregation of amyloid-${\alpha}$ ($A{\alpha}$) and hyperphosphorylated tau leads to synaptic deficits and neurodegeneration, thereby to memory loss. Among the established genetic risk factors for AD, the ${\varepsilon}4$ allele of apolipoprotein E (APOE) is the strongest genetic risk factor. We and others previously demonstrated that apoE regulates $A{\alpha}$ aggregation and clearance in an isoform-dependent manner. While the effect of apoE on $A{\alpha}$ may explain how apoE isoforms differentially affect AD pathogenesis, there are also other underexplored pathogenic mechanisms. They include differential effects of apoE on cerebral energy metabolism, neuroinflammation, neurovascular function, neurogenesis, and synaptic plasticity. ApoE is a major carrier of cholesterols that are required for neuronal activity and injury repair in the brain. Although there are a few conflicting findings and the underlying mechanism is still unclear, several lines of studies demonstrated that apoE4 leads to synaptic deficits and impairment in long-term potentiation, memory and cognition. In this review, we summarize current understanding of apoE function in the brain, with a particular emphasis on its role in synaptic plasticity and the underlying cellular and molecular mechanisms, involving low-density lipoprotein receptor-related protein 1 (LRP1), syndecan, and LRP8/ApoER2.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2006년도 춘계학술대회 논문집
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• pp.295-296
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• 2006

We developed wire frame drive unit based on SMA for the 3D Shape display. Our basic concept is wire frame combination connected with a chain form which can create various shapes and it compared with pin array mechanism which is not able to display mushroom shape. It imitates antagonist mechanism of human musculoskeletal system. we create similar motion using repair-relaxation mechanism and locking mechanism by SMA. Therefore, in this paper, we propose SMA control solution for actuating repair-relaxation mechanism and locking mechanism. In our control system. we use optical sensor and quantitative angle between wire frames for closed loop control. And we supply amplified current for SMA by circuit composed of transistor and apply PWM signal to circuit for efficient control. So, wire frame drive unit enable diversity angle control based on sensor data. And then combination of wire frame drive units will create various objects.

• 정보학연구
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• 제3권3호
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• pp.57-65
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• 2000

본 논문에서는 내장된 SDRAM 에 대한 기능 및 AC 변수를 테스트하는 BIST 회로의 알고리듬 및 회로 구현을 기술하였다 제안된 BIST 회로를 사용하여 내장된 SDRAM 의 고장난 비트 셀의 어드레스 위치를 출력시킴으로써 Redundancy 회로 사용에 관한 정좌를 제공하도록 설계하였다. 또 실지 동작 주파수에서의 내장된 SDRAM 의 AC 변수에 대한 테스트를 수행하여 메모리의 오동작이 발생된 경우 어떤 AC 변수가 설계 사양을 벗어나는지를 출력하도록 구현하였다. $0.25\mu\textrm{m}$ 셀 라이브러리를 이용하여 회로 합성하는 경우 전체 게이트 수는 약 4,500 개 정도이고, Verilog 레지스터 전송 언어를 사용하여 설계 및 시뮬레이션을 통하여 검증하였다. 하나의 AC 변수에 대해서 2Y-March 14N 알고리듬으로 테스트하는 경우 100Mhz 동작 주파수에서 테스트 시간은 200ms 정도이다.

• 대한토목학회논문집
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• 제40권4호
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• pp.353-362
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• 2020

우리나라는 비교적 지진에 대해 안전한 지역으로 인식되고 있었다. 그러나 최근 경주와 포항에서 발생한 지진으로 인한 시설물에 상당한 피해가 발생함에 따라 이미 건축된 구조물의 유지, 보수에 관한 관심이 높아지고 있다. 따라서 기존 구조물에 적용 가능한 제진기술에 대한 관심 또한 높아지고 있다. 그러나 제진기술은 강한 지반 운동으로 인한 장치의 손상으로 인하여 성능 저하의 문제점이 있다. 최근 이러한 문제를 해결하기 위해, 가새 부재에 응력을 제거함으로써 자동복원이 가능한 초탄성 형상기억합금을 적용하는 연구가 이뤄지고 있다. 따라서 본 연구에서는 초탄성 형상기억합금을 적용한 비좌굴 가새 부재를 활용하여 자동복원 프레임 구조물을 구성하고 비선형 동적 해석을 통하여 초탄성 형상기억합금의 재료적 우수성과 구조물의 내진성능을 평가 및 검증하였다.

• Smart Structures and Systems
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• 제24권1호
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• pp.127-139
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• 2019

Residual drifts after an earthquake can incur huge repair costs and might need to replace the infrastructure because of its non-reparability. Proper functioning of bridges is also essential in the aftermath of an earthquake. In order to mitigate pounding and unseating damage of bridges subjected to earthquakes, a self-adaptive Ni-Ti shape memory alloy (SMA)-cable-based frictional sliding bearing (SMAFSB) is proposed considering self-adaptive centering, high energy dissipation, better fatigue, and corrosion resistance from SMA-cable component. The developed novel bearing is associated with the properties of modularity, replaceability, and earthquake isolation capacity, which could reduce the repair time and increase the resilience of highway bridges. To evaluate the super-elasticity of the SMA-cable, pseudo-static tests and numerical simulation on the SMA-cable specimens with a diameter of 7 mm are conducted and one dimensional (1D) constitutive hysteretic model of the SMAFSB is developed considering the effects of gap, self-centering, and high energy dissipation. Two types of the SMAFSB (i.e., movable and fixed SMAFSBs) are applied to a two-span continuous reinforced concrete (RC) bridge. The seismic vulnerabilities of the RC bridge, utilizing movable SMAFSB with the constant gap size of 60 mm and the fixed SMAFSBs with different gap sizes (e.g., 0, 30, and 60 mm), are assessed at component and system levels, respectively. It can be observed that the fixed SMAFSB with a gap of 30 mm gained the most retrofitting effect among the three cases.

• Smart Structures and Systems
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• 제21권4호
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• pp.479-491
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• 2018

Shape memory alloys (SMA) exhibit superelasticity which refers to the capability of entirely recovering large deformation upon removal of applied forces and dissipating input energy during the cyclic loading reversals when the environment is above the austenite finish temperature. This property is increasingly favored by the earthquake engineering community, which is currently developing resilient structures with prompt recovery and affordable repair cost after earthquakes. Compared with the other SMAs, NiTi SMAs are widely deemed as the most promising candidate in earthquake engineering. This paper contributes to evaluate the seismic performance of properly designed concentrically braced frames (CBFs) equipped with NiTi SMA braces under earthquake ground motions corresponding to frequently-occurred, design-basis and maximum-considered earthquakes. An ad hoc seismic design approach that was previously developed for structures with idealized SMAs was introduced to size the building members, by explicitly considering the strain hardening characteristics of NiTi SMA particularly. The design procedure was conducted to compliant with a suite of ground motions associated with the hazard level of design-basis earthquake. A total of four six-story CBFs were designed by setting different ductility demands for SMA braces while designating with a same interstory drift target for the structural systems. The analytical results show that all the designed frames successfully met the prescribed seismic performance objectives, including targeted maximum interstory drift, uniform deformation demand over building height, eliminated residual deformation, controlled floor acceleration, and slight damage in the main frame. In addition, this study indicates that the strain hardening behavior does not necessarily impose undesirable impact on the global seismic performance of CBFs with SMA braces.