• Title/Summary/Keyword: memory device

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Dynamic Bandwidth Distribution Method for High Performance Non-volatile Memory in Cloud Computing Environment (클라우드 환경에서 고성능 저장장치를 위한 동적 대역폭 분배 기법)

  • Kwon, Piljin;Ahn, Sungyong
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.20 no.3
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    • pp.97-103
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    • 2020
  • Linux Cgroups takes a fundamental role for sharing system resources among multiple containers on container-based cloud computing environment. Especially for I/O resource, Linux Cgroups supports a mechanism for sharing I/O bandwidth in proportion to I/O weight. However, the current mechanism of Linux Cgroups using BFQ I/O scheduler seriously degrades the I/O performance with high bandwidth storage device such as NVMe SSDs. In this paper, we proposed a new feedback based I/O bandwidth sharing scheme for Linux Cgroups which allocates I/O credits to containers according to I/O weights and adjusts the amount of credits to performance fluctuation of NVMe SSDs. The proposed scheme is implemented on Linux kernel 5.3 and evaluated. The evaluation results show that it can share the I/O bandwidth among multiple containers proportionally to I/O weights while improving I/O performance more than twice as high as the existing scheme.

Performance Improvement and ASIC Design of OAM Function Using Special Cell Field (특별 셀 영역을 이용한 OAM 기능의 성능 향상 및 ASIC 설계)

  • Park, Hyoung-Keun;Kim, Hwan-Yong
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.36C no.2
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    • pp.26-36
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    • 1999
  • In this paper, the novel scheme of OAM performance management function is proposed to supply the most of network resources and reliable services by processing data having various QoS(quality of service) in the view of cell loss and cell delay of ATM networks Also, the special fields of OAM cell are defined in order to improve correlate control, operation, and management technique between networks which is required to flexibility and precision control as detecting the performance information of the variable networks periodically. The proposed OAM function, the input/output function of cell, and the interface function of the accessory device which is likely to the memory/CPU are designed to ASIC. The designed chip is carried out the back-end simulation using Verilog-XL simulator of Cadence. In result, it is able to performs an accurate control in $2{\mu}s$.

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A Study on the Phosphorous Concentration and Rs Property of the Doped Polysilicon by LPCVD Method of Batch type (Batch 형태 LPCVD법에 의한 폴리실리콘의 인농도 및 Rs 특성에 관한 연구)

  • 정양희;김명규
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.11 no.3
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    • pp.195-202
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    • 1998
  • The LPCVD system of batch type for the massproduction of semiconductor fabrication has a problem of phosphorous concentration uniformity in the boat. In this paper we study an improvement of the uniformity for phosphorous concentration and sheet resistance. These property was improved by using the nitrogen process and modified long nozzle for gas injection tube in the doped polysilicon deposition system. The phosphorous concentration and its uniformity for polysilicon film are measured by XRF(X-ray Fluorescence) for the conventional process condition and nitrogen process. In conventional process condition, the phosphorous concentration, it uniformity and sheet resistance for polysilicon film are in the range of 3.8~5.4$\times$10\ulcorner atoms/㎤, 17.3% and 59~$\Omega$/ , respectively. For the case of nitrogen process the corresponding measurements exhibited between 4.3~5.3$\times$10\ulcorner atoms/㎤, 10.6% and 58~81$\Omega$/ . We find that in the nitrogen process the uniformity of phosphorous concentration improved compared with conventional process condition, however, the sheet resistance in the up zone of the boat increased about 12 $\Omega$/ . In modified long nozzle, the phosphorous concentration, its uniformity and sheet resistance for polysilicon films are in the range of 4.5~5.1$\times$10\ulcorner atoms/㎤, 5.3% and 60~65$\Omega$/ respectively. Annealing after $N_2$process gives the increment of grain size and the decrement of roughness. Modification of nozzle gives the increment of injection amount of PH$_3$. Both of these suggestion result in the stable phosphorous concentration and sheet resistance. The results obtained in this study are also applicable to process control of batch type system for memory device fabrication.

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The effect of post-annealing temperature on $Bi_{3.25}La_{0.75}Ti_3O_{12}$ thin films deposited by RF magnetron sputtering (RF magnetron sputtering법에 의한 BLT 박막의 후열처리 온도에 관한 영향)

  • Lee, Ki-Se;Lee, Kyu-Il;Park, Young;Kang, Hyun-Il;Song, Joon-Tae
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.07b
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    • pp.624-627
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    • 2003
  • The BLT thin-films were one of the promising ferroelectric materials with a good leakage current and degradation behavior on Pt electrode. The BLT target was sintered at $1100^{\circ}C$ for 4 hours at the air ambient. $Bi_{3.25}La_{0.75}Ti_3O_{12}$ (BLT) thin-film deposited on $Pt/Ti/SIO_2/Si$ wafer by rf magnetron sputtering method. At annealed $700^{\circ}C$, (117) and (006) peaks appeared the high intensity. The hysteresis loop of the BLT thin films showed that the remanent polarization ($2Pr=Pr^+-Pr^-$) was $16uC/cm^2$ and leakage current density was $1.8{\times}10^{-9}A/cm^2$ at 50 kV/cm with coersive electric field when BLT thin-films were annealed at $700^{\circ}C$. Also, the thin film showed fatigue property at least up to $10^{10}$ switching bipolar pulse cycles under 7 V. Therefore, we induce access to optimum fabrication condition of memory device application by rf-magnetron sputtering method in this report.

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A Study on the Security Threats of IoT Devices Exposed in Search Engine (검색엔진에 노출된 IoT 장치의 보안 위협에 대한 연구)

  • Han, Kyong-Ho;Lee, Seong-Ho
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.65 no.1
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    • pp.128-134
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    • 2016
  • IoT devices including smart devices are connected with internet, thus they have security threats everytime. Particularly, IoT devices are composed of low performance MCU and small-capacity memory because they are miniaturized, so they are likely to be exposed to various security threats like DoS attacks. In addition, in case of IoT devices installed for a remote place, it's not easy for users to control continuously them and to install immediately security patch for them. For most of IoT devices connected directly with internet under user's intention, devices exposed to outside by setting IoT gateway, and devices exposed to outside by the DMZ function or Port Forwarding function of router, specific protocol for IoT services was used and the devices show a response when services about related protocol are required from outside. From internet search engine for IoT devices, IP addresses are inspected on the basis of protocol mainly used for IoT devices and then IP addresses showing a response are maintained as database, so that users can utilize related information. Specially, IoT devices using HTTP and HTTPS protocol, which are used at usual web server, are easily searched at usual search engines like Google as well as search engine for the sole IoT devices. Ill-intentioned attackers get the IP addresses of vulnerable devices from search engine and try to attack the devices. The purpose of this study is to find the problems arisen when HTTP, HTTPS, CoAP, SOAP, and RestFUL protocols used for IoT devices are detected by search engine and are maintained as database, and to seek the solution for the problems. In particular, when the user ID and password of IoT devices set by manufacturing factory are still same or the already known vulnerabilities of IoT devices are not patched, the dangerousness of the IoT devices and its related solution were found in this study.

The research regarding the energy storage device which applies the carbon nanotube (탄소나노튜브를 활용한 에너지 저장 소자에 관한 연구)

  • Kim, Do-Hwan;Kang, Soon-Duk
    • The Journal of Information Technology
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    • v.10 no.2
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    • pp.37-45
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    • 2007
  • The multiple-ability which the structure and the physical properties which the carbon or scull tube are unique show the applicability is superior in the plane indication element which is an indispensability of information communications apparatus, the stubbornness memory element, 2nd change of air and the rough copy dosage [khay] plaque seater, the hydrogen store material and the chemical sensor back and it has the possibility which will pass over the limit which the element of existing has. from the present paper it compared in the steel and only 10 the boat it did and it analyzed against an energy storage space voluntary application and developmental apply the carbon or scull tube trend in order about under researching the effective energy storage element it could be appeared, the technique of the strong carbon nano tube. 1. The hazard which embodies the energy storage element which uses the carbon or scull tube it follows in the function which stands and CNT of the structure which is various is necessary. 2. CNT fabrications of each one must precede possible not only must be each Cabinet conference circumstances quality gain and loss. 3. The structural control of syntheses, length controls, diameter controls and the metal - CNT junction control backs of quality CNT must precede. Applies the hereafter carbon or the scull tube in the various element with the primary preceding base technique for the structural plan technique of the carbon or scull tube to be certainly established, it does, secondarily the various element functional control technique which uses the carbon or scull tube is researched and will do.

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Design Optimization Techniques for the SSD Controller (SSD 컨트롤러 최적 설계 기법)

  • Yi, Doo-Jin;Han, Tae-Hee
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.8
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    • pp.45-52
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    • 2011
  • Flash memory is becoming widely prevalent in various area due to high performance, non-volatile features, low power, and robust durability. As price-per-bit is decreased, NAND flash based SSDs (Solid State Disk) have been attracting attention as the next generation storage device, which can replace HDDs (Hard Disk Drive) which have mechanical properties. Especially for the single package SSD, if channel number or FIFO buffer size per channel increases to improve performance, the size of a controller and I/O pin count will increase linearly with channel numbers and form factor will be affected. We propose a novel technique which can minimize form factor by optimizing the number of NAND flash channels and the size of interface FIFO buffer in the SSD. For SSD with 10 channel and double buffer, the experimental results show that buffer block size can be reduced about 73% without performance degradation and total size of a controller can be reduced about 40% because control block per channel and I/O pin count decrease according to decrease channel number.

Data De-duplication and Recycling Technique in SSD-based Storage System for Increasing De-duplication Rate and I/O Performance (SSD 기반 스토리지 시스템에서 중복률과 입출력 성능 향상을 위한 데이터 중복제거 및 재활용 기법)

  • Kim, Ju-Kyeong;Lee, Seung-Kyu;Kim, Deok-Hwan
    • Journal of the Institute of Electronics and Information Engineers
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    • v.49 no.12
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    • pp.149-155
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    • 2012
  • SSD is a storage device of having high-performance controller and cache buffer and consists of many NAND flash memories. Because NAND flash memory does not support in-place update, valid pages are invalidated when update and erase operations are issued in file system and then invalid pages are completely deleted via garbage collection. However, garbage collection performs many erase operations of long latency and then it reduces I/O performance and increases wear leveling in SSD. In this paper, we propose a new method of de-duplicating valid data and recycling invalid data. The method de-duplicates valid data and then recycles invalid data so that it improves de-duplication ratio. Due to reducing number of writes and garbage collection, the method could increase I/O performance and decrease wear leveling in SSD. Experimental result shows that it can reduce maximum 20% number of garbage collections and 9% I/O latency than those of general case.

The hysteresis characteristic of Feedback field-effect transistors with fluctuation of gate oxide and metal gate (게이트 절연막과 게이트 전극물질의 변화에 따른 피드백 전계효과 트랜지스터의 히스테리시스 특성 확인)

  • Lee, Kyungsoo;Woo, Sola;Cho, Jinsun;Kang, Hyungu;Kim, Sangsig
    • Journal of IKEEE
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    • v.22 no.2
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    • pp.488-490
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    • 2018
  • In this study, we propose newly designed feedback field-effect transistors that utilize the positive feedback of charge carriers in single-gated silicon channels to achieve steep switching behaviors. The band diagram, I-V characterisitcs, subthreshold swing, and on/off current ratio are analyzed using a commercial device simulator. To demonstrate the changing characteristics of hysteresis, one of the important features of the feedback field effect transistor, we simulated changing the gate insulating material and the gate metal electrode. The fluctuation in the characteristics changed the $V_{TH}$ of the hysteresis and showed a decrease in width of the hysteresis.

An Efficient Hardware Implementation of Square Root Computation over GF(p) (GF(p) 상의 제곱근 연산의 효율적인 하드웨어 구현)

  • Choe, Jun-Yeong;Shin, Kyung-Wook
    • Journal of IKEEE
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    • v.23 no.4
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    • pp.1321-1327
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    • 2019
  • This paper describes an efficient hardware implementation of modular square root (MSQR) computation over GF(p), which is the operation needed to map plaintext messages to points on elliptic curves for elliptic curve (EC)-ElGamal public-key encryption. Our method supports five sizes of elliptic curves over GF(p) defined by the National Institute of Standards and Technology (NIST) standard. For the Koblitz curves and the pseudorandom curves with 192-bit, 256-bit, 384-bit and 521-bit, the Euler's Criterion based on the characteristic of the modulo values was applied. For the elliptic curves with 224-bit, the Tonelli-Shanks algorithm was simplified and applied to compute MSQR. The proposed method was implemented using the finite field arithmetic circuit with 32-bit datapath and memory block of elliptic curve cryptography (ECC) processor, and its hardware operation was verified by implementing it on the Virtex-5 field programmable gate array (FPGA) device. When the implemented circuit operates with a 50 MHz clock, the computation of MSQR takes about 18 ms for 224-bit pseudorandom curves and about 4 ms for 256-bit Koblitz curves.