• The Journal of the Korea institute of electronic communication sciences
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• v.4 no.4
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• pp.301-305
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• 2009

Pt nanoparticles with a narrow size distribution (dia. ~4 nm) were synthesized via an alcohol reduction method and used for the fabrication of hybrid Pt-$SiO_2$ nanoparticles. Also, the self-assembled monolayer of Pt nanoparticles (NPs) was studied as a charge trapping layer for non-volatile memory (NVM) applications. A metal-oxide-semiconductor (MOS) type memory device with Pt NPs exhibits a relatively large memory window. These results indicate that the self-assembled Pt NPs can be utilized for NVM devices. In addition, it was tried to show the control of thin-film thickness of hybrid Pt-$SiO_2$ nanoparticles indicating the possibility of much applications for the MOS type memory devices.

• Journal of the Korean Vacuum Society
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• v.17 no.4
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• pp.253-261
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• 2008

Programmable metallizaton cell (PMC) memory device has been known as one of the next generation non-volatile memory devices, because it includes non-volatility, high speed and high ON/OFF resistance ratio. This paper reviews the operation principle of the device. Besides, the recent research results of professor Kozicki who firstly invented the device and investigated it for the memory applications, NEC corporation which studied it for the FPGA (field programmable gate array) switch applications, ETRI and chungnam national university which examined Te-based devices are introduced.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.8
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• pp.669-673
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• 2011

The charged particle type display is a kind of the reflectivity type display and shows an image by absorption and reflection of external light source, which has keep an image without additional electric power because of bistability. In this paper, we made a device whose cell gap is $56\;{\mu}m$ and also analyzed driving and memory characteristics by applied driving voltages. As a result, we found that the driving voltage and memory effect depend on q/m(charge to mass ratio) of charged particle. In this case of breakdown voltage, the devices showed degradation of reflectivity and memory effect due to irregular movement of overcharged particles. In addition, contrast ratio of the device varies with memory effect. Thus, we consider that device needs uniform q/m for improvement of electric and optical properties and memory effect.

• Proceedings of the Korean Magnestics Society Conference
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• 2002.12a
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• pp.188-189
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• 2002

One of the current goals in memory device developments is to realize a nonvolatile memory, i.e., the stored information maintains even when the power is turned off. The representative candidates for nonvolatile memories are magnetic random access memory (MRAM) and ferroelectric random access memory (FRAM). In order to achieve a high density memory in MRAM device, the external magnetic field should be localized in a tiny cell to control the direction of spontaneous magnetization. (omitted)

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.4B
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• pp.403-410
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• 2004

In general communication system is composed of processor subsystems, I/O processor subsystems and data storage device subsystems those are classified as their functions. In order to improve the data reliability, all subsystems are redundant. Storage device keeps the operational information such as system related information and charging information, and such informations must be stored in non-volatile memory. Flash memory and battery backup memory are commonly used as the non-volatile storage devices. But such kind of memories are expensive per unit capacity and data can't be restored when lost while not being backed up. In this paper we develop a redundant storage device to store a lot of data safely and reliably in communication system. The device consists of micro-controller, FPGA and hard disk It provides many functions those are rebuilding, automatic remapping, host service and remote host service. Also it is designed to provide host service while rebuilding is being done in order not to interrupt the communication services. The developed device can be used instead of expensive storage device like flash memory in various communication systems.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.240.2-240.2
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• 2013

The device scale of flash memory was confronted with quantum mechanical limitation. The next generation memory device will be required a break-through for the device scaling problem. Especially, graphene is one of important materials to overcome scaling and operation problem for the memory device, because ofthe high carrier mobility, the mechanicalflexibility, the one atomic layer thick and versatile chemistry. We demonstrate the hybrid memory consisted with the metal-oxide quantum dots and the mono-layered graphene which was transferred to $SiO_2$ (5 nm)/Si substrate. The 5-nm thick secondary $SiO_2$ layer was deposited on the mono-layered graphene by using ultra-high vacuum sputtering system which base pressure is about $1{\times}10^{-10}$ Torr. The $In_2O_3$ quantum dots were distributed on the secondary $SiO_2$2 layer after chemical reaction between deposited In layer and polyamic acid layer through soft baking at $125^{\circ}C$ for 30 min and curing process at $400^{\circ}C$ for 1 hr by using the furnace in $N_2$ ambient. The memory devices with the $In_2O_3$ quantum dots on graphene monolayer between $SiO_2$ thin films have demonstrated and evaluated for the application of next generation nonvolatile memory device. We will discuss the electrical properties to understating memory effect related with quantum mechanical transport between the $In_2O_3$ quantum dots and the Fermi level of graphene layer.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.495-498
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• 1998

Mobile computers have restrictions for size, weight, and power consumption that are different from traditional workstations. Storage device must be smaller, lighter. Low power consumed storage devices are needed. At the present time, flash memory device is a reasonable candidate for such device. But flash memory has drawbacks such as bulk erase operation and slow program time. This causes of worse average write performances. This paper suggests a storage method which improves write performance.

• Journal of the Semiconductor & Display Technology
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• v.14 no.2
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• pp.41-45
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• 2015

From 20nm technology node, the finFET has become standard device for ULSI's. However, the finFET process made stacking gate non-volatile memory obsolete. Some reported capacitor-less DRAM structure by utilizing the FBE. We present possible non-volatile memory device structure similar to the dual gate MOSFET. One of the gates is left floating. Since body of the finFET is only 40nm thick, control gate bias can make electron tunneling through the floating gate oxide which sits across the body. For programming, gate is biased to accumulation mode with few volts. Simulation results show that the programming electron current flows at the interface between floating gate oxide and the body. It also shows that the magnitude of the programming current can be easily controlled by the drain voltage. Injected electrons at the floating gate act similar to the body bias which changes the threshold voltage of the device.

• Journal of Information Display
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• v.10 no.4
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• pp.184-187
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• 2009

A liquid crystal device with switchable dynamic and memory modes was investigated and developed. The proposed device reveals the splay, $\pi$-twist, and bend states via selective switching among them. In the dynamic mode, the device is operated in the bend state, which exhibits a wide viewing-angle and a fast-response-time due to its self-compensated bend structure and flow-accelerated fast response time, respectively. In the memory mode, the permanent memory characteristics in the splay and $\pi$-twist sates are obtained, respectively. The switching mechanisms of the tristate device are also proposed.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.600-603
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• 2009

The liquid crystal device with switchable dynamic mode and memory mode has been investigated and developed. The proposed device reveals splay, ${\pi}$ twist and bend states by selective switching among them. In the dynamic mode, this device is operated in the bend state which exhibits the wide view angle and fast response time properties due to the self-compensated bend structure and flow accelerated fast response time. In the memory mode, the permanent memory characteristics in the splay and ${\pi}$ twist sates are obtained, respectively. The switching mechanisms of the tristate device are also proposed.