• Title/Summary/Keyword: memories

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Neural Network Cubes (N-Cubes) for Unsupervised learning in Gray-Scale noise

  • Lee, Won-Hee
    • Journal of the Korean Institute of Intelligent Systems
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    • v.9 no.6
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    • pp.571-576
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    • 1999
  • We consider a class of auto-associative memories namely N-Cubes (Neural-network Cubes) in which 2-D gray-level images and hidden sinusoidal 1-D wavelets are stored in cubical memories. First we develop a learning procedure based upon the least-squares algorithm, Therefore each 2-D training image is mapped into the associated 1-D waveform in the training phase. Second we show how the recall procedure minimizes errors among the orthogonal basis functions in the hidden layer. As a 2-D images ould be retrieved in the recall phase. Simulation results confirm the efficiency and the noise-free properties of N-Cubes.

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A Study on the Characteristics of Synaptic Multiplication for SONOSFET Memory Devices (SONOSFET 기억소자의 시랩스 승적특성에 관한 연구)

  • 이성배;김병철;김주연;이상배;서광열
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1996.11a
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    • pp.1-4
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    • 1996
  • EEPROM technology has been used for storing analog weights as charge in a nitride layer between gate and channel of a field effect transistor. In the view of integrity and fabrication process, it is essentially required that SONOSFET is capable of performing synapse function as a basic element in an artificial neural networks. This work has introduced the VLSI implementation for synapses including current study and also investigated physical characteristics to implement synapse circuit using SONOSFET memories. Simulation results are shown in this work. It is proposed that multiplication of synapse element using SONOSFET memories will be developed more compact implementation under Present fabrication processes.

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A Multi-Stage CMOS Charge Pump for Low-Voltage Memories

  • Lim, Gyu-Ho;Yoo, Sung-Han;Kim, Young-Hee
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2002.05a
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    • pp.283-287
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    • 2002
  • To remedy both the degradation and saturation of the output voltages in the modified Dickson pump. a new multi-stage charge pump circuit is presented in this paper. Here using PMOS charge-transfer switches instead of NMOS ones eliminates the necessity of diode-configured output stage in the modified-Dickson pump, achieving the improved voltage pumping gain and its output voltages proportional to the stage numbers. Measurement indicates that VOUT/3VDD of this new pump circuit with two stages reaches to a value as high as 0.94 even with low VDD=1.0 V, strongly addressing that this scheme is very favorable at low-voltage memory applications.

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Culture, Memory, and Literature: In Search of an Interdisciplinary Relationship Between Cultural and Literary Studies (문화, 회상 그리고 문학: 문화학과 문예학의 학제적 연관성에 관한 모색″)

  • 최문규
    • Lingua Humanitatis
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    • v.1 no.2
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    • pp.67-90
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    • 2001
  • In the past few years, a trend has emerged emphasizing the interdisciplinary relationship between cultural and literary studies, and "memory" has been suggested as the central theme in this trend. According to Aleida and Jan Assmann, "memory" as collective memory (not individual recollection) has various functions and forms, of which communicative memory and cultural memory occupy opposite poles of a central axis. Whereas communicative memory relates to the living past shared among contemporaries, cultural memory relates to "recollected history" rather than factual history. Cultural memory finds transmission through symbolic media such as myths, festivities, and literary works. Literary works preserve critical and living memories as opposed to forgotten memories. In other words, literature should be better read as "criticism and memory" than "imitation and preservation." Works of literature are characterized by a turning away from repetition toward representation-the process of "making present" of what is past.

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Material Recognition Using Temperature Response Curve Fitting and Fuzzy Neural Network

  • Young-C. Lim;Park, Jin-K;Ryoo, Young-J;Jang, Young-H;Kim, I-G.
    • Proceedings of the Korean Institute of Intelligent Systems Conference
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    • 1995.10b
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    • pp.15-24
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    • 1995
  • This paper describes a system that can be used to recognize an unknown material regardless of the fuzzy neural network(FNN). There are some problems to realize the recognition system using temperature response. It requires too many memories to store the vast temperature response data and it has to be filtered to remove noise which occurs in experiment. And the temperature response is influenced by the change of ambient temperature. So, this paper proposes a practical method using curve fitting to remove above problems of memories and noise. and FNN is proposed to overcome the problem caused by the change of ambient temperature. Using the FNN which is learned by temperature responses on fixed ambient. Temperatures and known thermal conductivity, the thermal conductivity of the material can be inferred on various ambient temperatures. So the material can be recognized by the thermal conductivity.

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Designing Education Contents for Chinese Character Utilizing Internet of Things (IoT)

  • Jung, Sugkyu
    • Smart Media Journal
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    • v.5 no.2
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    • pp.24-32
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    • 2016
  • Recently, the development of electronic teaching materials and the demand of digital learners have led the needs on the education contents that replace learning from character information and the change of an information design method for this. Chinese character education in the traditional schooling mainly focuses on writing and memorization (semantic memory). This way that the stories do not exist has brought the learners' recognition that Chinese character is difficult to learn. Meanwhile, for a language study such as English, cross-media development between printed materials and audio-visual materials has been actively introduced. The method that extends episode memories along with memorization through a story is widely used. Therefore, this content suggests a prototype, which is broken away from an existing way of learning Chinese character that mainly focuses on writing, one sided instruction and information cramming. This makes learners learn through a story from printed materials and animation. Furthermore, it suggests a method that extends episode memories through Chinese education contents based on IoT explaining the principle of Chinese character by combining IT technology (information and communications, IoT) and education contents on block toys.

CQ importance sampling technique for the rician fading channel (Rician 페이딩 채널에 대한 CQ Importance Sampling 기법)

  • 이대일;김동인;황인관
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.22 no.5
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    • pp.1097-1106
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    • 1997
  • Most works on importance sampling (IS) as an efficient evaluation technique havd been done in an additibe white gaussian noise channel (Awgn). In this paper we propose a CQ(conventional importance sampling and quasi-translantion) IS technique for the mobile radio channel modeled as Rician fading, and analyze the IS estimator's variance to determine optimum IS parameters and the minimum number of run times. Reference showed that CIS technique has a poor performance for systems with meories, but it is shown that the CIS technique can be improved by combining with quasi-translation technique even for systems with memories. Here the CQ IS technique modifies the variance of additive noise and also performs quasi-translation for the fading distribution. We determine the optimum IS parameters of the proposed CQ IS estimator and whow that the simulation gains are about 10$^{3}$~10$^{6}$ for the mobile communication systems with memories in case of the expected BERs 10$^{-5}$ ~10$^{-8}$ .

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Fabrication of Tern bit level SONOS F1ash memories (테라비트급 SONOS 플래시 메모리 제작)

  • Kim, Joo-Yeon;Kim, Byun-Cheul;Seo, Kwang-Yell;Kim, Jung-Woo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.06a
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    • pp.26-27
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    • 2006
  • To develop tera-bit level SONOS flash memories, SONOS unit memory and 64 bit flash arrays are fabricated. The unit cells have both channel length and width of 30nm. The NAND & NOR arrays are fabricated on SOI wafer and patterned by E-beam. The unit cells represent good write/erase characteristics and reliability characteristics. SSL-NOR array have normal write/erase operation. These researches are leading the realization of Tera-bit level non-volatile nano flash memory.

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Efficient Use of On-chip Memory through Profile-Driven Array Reorganization

  • Cho, Doosan;Youn, Jonghee
    • IEMEK Journal of Embedded Systems and Applications
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    • v.6 no.6
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    • pp.345-359
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    • 2011
  • In high performance embedded systems, the use of multiple on-chip memories is an essential architectural feature for exploiting inherent parallelism in multimedia applications. This feature allows multiple data accesses to be executed in parallel. However, it remains difficult to effectively exploit of multiple on-chip memories. The successful use of this architecture strongly depends on how to efficiently detect and exploit memory parallelism in target applications. In this paper, we propose a technique based on a linear array access descriptor [1], which is generated from profiled data, to detect and exploit memory parallelism. The proposed technique tackles an array reorganization problem to maximize memory parallelism in multimedia applications. We present preliminary experiments applying the proposed technique onto a representative coarse grained reconfigurable array processor (CGRA) with multimedia kernel codes. Our experimental results demonstrate that our technique optimizes data placement by putting independent data on separate storage. The results exhibit 9.8% higher performance on average compared to the existing method.

Bandwidth-aware Memory Placement on Hybrid Memories targeting High Performance Computing Systems

  • Lee, Jongmin
    • Journal of the Korea Society of Computer and Information
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    • v.24 no.8
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    • pp.1-8
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    • 2019
  • Modern computers provide tremendous computing capability and a large memory system. Hybrid memories consist of next generation memory devices and are adopted in high performance systems. However, the increased complexity of the microprocessor makes it difficult to operate the system effectively. In this paper, we propose a simple data migration method called Bandwidth-aware Data Migration (BDM) to efficiently use memory systems for high performance processors with hybrid memory. BDM monitors the status of applications running on the system using hardware performance monitoring tools and migrates the appropriate pages of selected applications to High Bandwidth Memory (HBM). BDM selects applications whose bandwidth usages are high and also evenly distributed among the threads. Experimental results show that BDM improves execution time by an average of 20% over baseline execution.