• Title/Summary/Keyword: master/slave

Search Result 546, Processing Time 0.025 seconds

Development of Autonomous Algorithm Using an Online Feedback-Error Learning Based Neural Network for Nonholonomic Mobile Robots (온라인 피드백 에러 학습을 이용한 이동 로봇의 자율주행 알고리즘 개발)

  • Lee, Hyun-Dong;Myung, Byung-Soo
    • Journal of the Korean Institute of Intelligent Systems
    • /
    • v.21 no.5
    • /
    • pp.602-608
    • /
    • 2011
  • In this study, a method of designing a neurointerface using neural network (NN) is proposed for controlling nonholonomic mobile robots. According to the concept of virtual master-slave robots, in particular, a partially stable inverse dynamic model of the master robot is acquired online through the NN by applying a feedback-error learning method, in which the feedback controller is assumed to be based on a PD compensator for such a nonholonomic robot. The NN for the online feedback-error learning can composed that the input layer consists of six units for the inputs $x_i$, i=1~6, the hidden layer consists of two hidden units for hidden outputs $o_j$, j=1~2, and the output layer consists of two units for the outputs ${\tau}_k$, k=1~2. A tracking control problem is demonstrated by some simulations for a nonholonomic mobile robot with two-independent driving wheels. The initial q value was set to [0, 5, ${\pi}$].

Design of Synchronized Power Control Embedded System Based on Core-A Platform (Core-A 플랫폼을 이용한 동기형 전력제어 임베디드 시스템 설계)

  • Lee, Woo-Kyung;Moon, Dai-Tchul
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.18 no.6
    • /
    • pp.1413-1421
    • /
    • 2014
  • This paper realize power control embedded system with one master of Core-A 32-bit RISC processor and several slaves controling power with synchronized digital signals. Core-A platform is consisted of Core-A processor, AMBA bus, SSRAM, AC97, DMA, UART, GPIO etc. Slave is made by both digital part and analog part. The former generates various power control patterns synchronized with master signal. The latter converts 220V power proportional to 4 bit digital signals. design of Embedded system is executed in Flowrian II, in which software is cross-compiled and hardware is verified by simulation. Embedded system is implemented in FPGA board and CPLD chips as well as PCB board for analog power control.

Traffic-Adaptive Dynamic Integrated Scheduling Using Rendezvous Window md Sniff Mode (랑데부 윈도우와 스니프 모드를 이용한 트래픽 적응 동적 통합 스케줄링)

  • 박새롬;이태진
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.28 no.8A
    • /
    • pp.613-619
    • /
    • 2003
  • Bluetooth is a communication technology enabling short-range devices to be wirelessly connected. A master and one or more slave devices are connected to form a piconet, and piconets are joined to form a scatternet. The units participating in two or more piconets in a scatternet, is called bridge or gateway nodes. In order to operate the scatternet efficiently, both piconet scheduling for the master and slaves of a piconet, and scatternet scheduling for the bridge nodes are playing important roles. In this paper, we propose a traffic-adaptive dynamic scatternet scheduling algorithm based on rendezvous points and rendezvous windows. The performance of the proposed algorithm is compared and analyzed with that of a static scheduling algorithm via simulations. Simulation results show that our algorithm can distribute wireless resources efficiently to bridge nodes depending on the traffic characteristics.

Work Allocation Methods and Performance Comparisons on the Virtual Parallel Computing System based on the IBM Aglets (IBM Aglets를 기반으로 하는 가상 병렬 컴퓨팅 시스템에서 작업 할당 기법과 성능 비교)

  • Kim, Kyong-Ha;Kim, Young-Hak;Oh, Gil-Ho
    • Journal of KIISE:Computing Practices and Letters
    • /
    • v.8 no.4
    • /
    • pp.411-422
    • /
    • 2002
  • Recently, there have been active researches about the VPCS (Virtual Parallel Computing System) based on multiple agents. The PVCS uses personal computers or workstations that are dispersed all over the internet, rather than a high-cost supercomputer, to solve complex problems that require a huge number of calculations. It can be made up with either homogeneous or heterogeneous computers, depending on resources available on the internet. In this paper, we propose a new method in order to distribute worker agents and work packages efficiently on the VPCS based on the IBM Aglets. The previous methods use mainly the master-slave pattern for distributing worker agents and work packages. However, in these methods the workload increases dramatically at the central master as the number of agents increases. As a solution to this problem, our method appoints worker agents to distribute worker agents and workload packages. The proposed method is evaluated in several ways on the VPCS, and its results are improved to be worthy of close attention as compared with the previous ones.

Hybrid MAC Protocol Design for an Underwater Acoustic Network (수중음향통신망을 위한 하이브리드 MAC 프로토콜 설계)

  • Park, Jong-Won;Ko, Hak-Lim;Cho, A-Ra;Yun, Chang-Ho;Choi, Young-Chol;Lim, Yong-Kon
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.13 no.10
    • /
    • pp.2088-2096
    • /
    • 2009
  • This paper deals with hybrid MAC protocol design for underwater acoustic networks. The proposed MAC protocol has the cluster structure with a master node and slave nodes, and the hybrid network structure that combines a contention free period based on TDMA(Time Division Multiple Access) with a contention period. The suggested MAC protocol has a beacon packet for supervising network, a guard period between time slots for packet collision, time tag for estimation of propagation delay with a master node, the time synchronization of nodes, entering and leaving of network, and the communication method among nodes. In this paper, we adapt the proposed hybrid MAC protocol to AUV network, that is the representative mobile device of underwater acoustic network, and verify this protocol is applicable in real underwater acoustic network environment.

Error Assessment of Attitude Determination Using Wireless Internet-Based DGPS (무선인터넷기반의 DGPS를 이용한 동체의 자세결정 성능평가)

  • Lee Hong Shik;Lim Sam Sung;Park Jun Ku
    • Journal of the Korean Society of Surveying, Geodesy, Photogrammetry and Cartography
    • /
    • v.23 no.2
    • /
    • pp.101-108
    • /
    • 2005
  • Inertial Navigation System has been used extensively to determine the position, velocity and attitude of the body. An INS is very expensive, however, heavy, power intensive, requires long setting times and the accuracy of the system is degraded as time passed due to the accumulated error. Global Positioning System(GPS) receivers can compensate for the Inertial Navigation System with the ability to provide both absolute position and attitude. This study describes a method to improve both the accuracy of a body positioning and the precision of an attitude determination using GPS antenna array. Existing attitude determination methods using low-cost GPS receivers focused on the relative vectors between the master and the slave antennas. Then the positioning of the master antenna is determined in meter-level because the single point positioning with pseudorange measurements is used. To obtain a better positioning accuracy of the body in this research, a wireless internet is used as an alternative data link for the real-time differential corrections and dual-frequency GPS receivers which is expected to be inexpensive was used. The numerical results show that this system has the centimeter level accuracy in positioning and the degree level accuracy in attitude.

FImplementation of RF Controller based on Digital System for TRS Repeater (TRS 중계기용 디지털기반 RF 제어 시스템의 구현)

  • Seo, Young-Ho
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.11 no.7
    • /
    • pp.1289-1295
    • /
    • 2007
  • In this paper, we implemented high-performance concurrent control system which manages whole RF systems with digital type and communicates with remote station on both wire and wireless networking. It consists of FPGA (Field Programmable Gate Array) part which controls forward/reverse LPA (Linear Power Amplifier), forward/reverse LNA (Low Noise Amplifier), channel cut wire/wireless TCP/IP, etc, master microprocessor (AVR), which manages the whole control system, Slave microprocessor which communicates SA (Spectrum Analyzer) and observes frequency spectrum of each channel with the resolution of 5KHz, 10 channel card microprocessor which independently observes each channel card and sets frequency synthesizer in channel cut and other peripherals and logics. The whole system is divided to two parts of H/W (hardware) and S/W (software) considering operational efficiency and concurrency, and implementation and cost. H/W consists of FPGA and microprocessor. We expected the optimized operation through H/W and SW co-design and hybrid H/W architecture.

Time Synchronization Algorithm based on FLL-Assisted-PLL for Telemetry System (FLL-Assisted-PLL 기반의 텔레메트리 시스템 정밀 시각동기 알고리즘)

  • Geon-Hee Kim;Mi-Hyun Jin
    • Journal of Advanced Navigation Technology
    • /
    • v.26 no.6
    • /
    • pp.441-447
    • /
    • 2022
  • In this paper, we propose a FLL-assisted-PLL based time synchronization algorithm for telemetry systems where frequency and phase errors exist in time synchronization pulse. The telemetry system may analyze the flight state by acquiring the state information in the distributed system. Therefor, in order to collect each state information without errors, precise time synchronization between the master and the slave is required. At this time, the master's time pulse have frequency and phase changes that can be caused by external and internal factors, so a method to maintain precision time synchronization is essential to provide telemetry data continuously. We propose the FLL-assisted-PLL based algorithm that is capable of high-speed synchronization and has high time synchronization accuracy. The proposed algorithm is verified through python simulation, and the VHDL Logic has been implemented in FPGA to check the performance according to the frequency errors and phase errors.

Implementation of a Point-to-Multipoint Wireless Communication System Based on The Bluetooth (블루투스 기반 점 대 다중점 무선 통신시스템의 구현)

  • Bae, Jin-Seop;Kang, Seog-Geun
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.13 no.9
    • /
    • pp.1921-1927
    • /
    • 2009
  • In this paper, a point-to-multipoint wireless communication system based on Bluetooth specifications, which is possibly applied to very large vessels, is implemented and analyzed. Here, a communication network is composed of a slave Bluetooth module connected to the task computer and multiple master Bluetooth modules equipped with a sensor. And exploiting the point-to-multipoint data communication among the Bluetooth modules, a surveillance system that recognizes and controls a variety of emergency situations happened on a large vessel is implemented. It is, therefore, considered that the wireless communication system implemented in this paper is possibly exploited a basic technology for the digital shipbuilding of the next generation.

Design and Analysis of User's Libraries for Parallel Computing based on the Internet (인터넷 기반의 병렬 컴퓨팅을 위한 사용자 라이브러리 설계 및 성능 분석)

  • Sin, Pil-Seop;Jeong, Jun-Mok;Maeng, Hye-Seon;Hong, Won-Gi;Kim, Sin-Deok
    • The Transactions of the Korea Information Processing Society
    • /
    • v.6 no.11
    • /
    • pp.2932-2945
    • /
    • 1999
  • As the Internet and Java technology have been growing up, parallel processing approach to utilize those idle resources connected to the Internet has become quite attractive. In this paper, JICE(Java Internet Computing Environment) was implemented as a parallel computing platform based on the Internet using multithreading and RMI mechanisms provided by Java. The basic model of JICE is constructed as three components, such as a client, a set of workers, and a broker. A worker communicates with other workers via a globally shared memory system. It provides users with master-slave programming model and a collection of library functions. The basic model of JICE is also extended as a multimanaging system. This multimanaging system is evaluated by analysis to show its effectiveness. According to numerical analysis and experiments with several benchmarks, it is shown that the performance of basic model depends on the shared memory reference ratio and user's library is a quite promising.

  • PDF