• Proceedings of the KIPE Conference
• /
• 2016.07a
• /
• pp.38-39
• /
• 2016

Most of fires are electric fires and 78.65% of those fires are caused by electric arc fault. This series arc fault can be caused not only by decrepit wire, pressed wire or contact badness etc. anywhere we use electricity. There are signs of heat release and flame discharge before the arc fire accident happens. This paper proposes a circuit topology for alarm system of series arc fault. We also verify the qualification of system through various arc fault simulator.

• Proceedings of the KIPE Conference
• /
• 2003.07a
• /
• pp.352-357
• /
• 2003

A new single stage power factor correction(PFC) AC/DC converter based on zero voltage switching(ZVS) full bridge topology is proposed. Since the series-connected two transformers act as both output inductor and main transformer by turns, the proposed converter has a wide ZVS range without additional devices for ZVS. Furthermore, since there is no need to use an output inductor, the proposed converter features high power density. The proposed converter gives the good power factor correction and low line current harmonics distortion. A mode analysis and experiment results are presented to verify the validity of the proposed converter.

• Journal of Electrical Engineering and Technology
• /
• v.6 no.2
• /
• pp.245-254
• /
• 2011

This paper presents a new group for multilevel converter that operates as symmetric and asymmetric state. The proposed multilevel converter generates DC voltage levels similar to other topologies with less number of semiconductor switches. It results in the reduction of the number of switches, losses, installation area, and converter cost. To verify the voltage injection capabilities of the proposed inverter, the proposed topology is used in dynamic voltage restorer (DVR) to restore load voltage. The operation and performance of the proposed multilevel converters are verified by simulation using SIMULINK/MATLAB and experimental results.

• Proceedings of the KIEE Conference
• /
• 2009.07a
• /
• pp.1577_1578
• /
• 2009

본 논문은 Electro Magnetic Topology(EMT)를 이용하여 전자장과 전송선로의 커플링 영향에 대해 해석한다. 본 논문은 BLT 방정식을 이용하여 외부 소스에 의해 영향을 받는 전송 선로의 해를 주파수 영역에서 구하였다. 위의 해석 방법을 양단에 저항 부하가 있는 2선 전송 선로에 적용하여, 외부에서 평면파 소스가 인가되었을 때의 각 전송 선로 종단에서의 전류의 파형을 Mode Matching(MoM), Finite Difference Time Domain(FDTD) 결과와 비교함으로 정확성을 확인하였다.

• Journal of Power Electronics
• /
• v.13 no.6
• /
• pp.928-938
• /
• 2013

This paper proposes a novel control method for a multi-output switched-resonant converter. Output voltage can be regulated against variations in the supply voltage and load by controlling the voltage of the resonant capacitor (pulse amplitude control). Precise control is possible when pulse amplitude control is combined with pulse number control. The converter is analyzed, and design considerations are explained by using examples. Control implementation is described and load regulation and ripples are analyzed by simulation and hardware results. The topology is modified to obtain an additional negative output without any additional hardware other than a diode. The analysis of such a triple output converter with two positive outputs and one negative output is conducted and confirmed. The topology and control scheme are scalable to any number of outputs.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2007.06a
• /
• pp.515-516
• /
• 2007

A novel design of contious-time filter for direct conversion receiver applications is proposed. The filter supports different modes including GSM, WCDMA. A 5th chebyshev filter is realized in a gm-C filter topology. The filter circuit is implemented in a standard CMOS $0.35{\mu}m$ processing parameter with a supply voltage of 2.5V. The HSPICE results show that the filter has 200KHz and 5MHz cutoff frequency, and each 3.4us and 85.44us gm value.

• Proceedings of the KIEE Conference
• /
• 2007.07a
• /
• pp.21-22
• /
• 2007

Topology processing is indispensable basic function as it generate a real-time BUS-BRANCH model in Energy Management Systems because most application softwares such as state estimation, power flow, etc., require BUS-BRANCH circuit data. This paper propose an expert system to generate BUS-BRANCH circuit model using Artificial Intelligence technology and it is applied to 154kV distribution substations.

• International Journal of Fuzzy Logic and Intelligent Systems
• /
• v.6 no.3
• /
• pp.255-263
• /
• 2006

In this paper, we introduce the concepts of ${\gamma}$-fuzzy feebly open and ${\gamma}$-fuzzy feebly closed sets in Sostak's fuzzy topological spaces and by using them, we explain the notions of ${\gamma}$-fuzzy F-closed spaces. Also, we give some characterization of ${\gamma}$-fuzzy F-closedness in terms of fuzzy filterbasis and ${\gamma}$-fuzzy feebly-${\theta}$-cluster points.

• Journal of Power Electronics
• /
• v.14 no.6
• /
• pp.1189-1196
• /
• 2014

A modular multilevel-clamped composited multilevel converter ($M-MC^2$) is proposed. $M-MC^2$ enables topology reconfiguration, power device reuse, and composited clamping. An advanced five-level converter ($5L-M-MC^2$) is derived from the concept of $M-MC^2$. $5L-M-MC^2$ integrates dual three-level T-type modules and one three-level neutral point clamped module. This converter can also integrate dual three-level T-type modules and one passive diode module by utilizing the device reuse scheme. The operation principle and SPWM modulation are discussed to highlight converter performance. The proposed $M-MC^2$ is comprehensively compared with state-of-the-art five-level converters. Finally, simulations and experimental results are presented to validate the effectiveness of the main contributions of this study.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.17 no.1
• /
• pp.158-165
• /
• 2013

In this paper, a new circuit topology of an ultra-wideband (UWB) 3.1-10.6GHz CMOS low noise amplifier is presented. The proposed UWB low noise amplifier is designed utilizing RC feedback and LC filter networks which can provide good input impedance matching. In this design, the current-reused topology is adopted to reduce the power consumption and the inductor-peaking technique is applied for the purpose of bandwidth extension. The performance results of this UWB low noise amplifier simulated in $0.18-{\mu}m$ CMOS process technology exhibit a power gain of 14-14.9dB, an input matching of better than -10.8dB, gain flatness of 0.9dB, and a noise figure of 2.7-3.3dB in the frequency range of 3.1-10.6GHz. In addition, the input IP3 is -5dBm and the power consumption is 12.5mW.