• Title/Summary/Keyword: low-dielectric materials

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용액공정을 이용한 SiOC/SiO2 박막제조

  • Kim, Yeong-Hui;Kim, Su-Ryong;Gwon, U-Taek;Lee, Jeong-Hyeon;Yu, Yong-Hyeon;Kim, Hyeong-Sun
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2009.11a
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    • pp.36.2-36.2
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    • 2009
  • Low dielectric materials have been great attention in the semiconductor industry to develop high performance interlayer dielectrics with low k for Cu interconnect technology. In our study, the dielectric properties of SiOC /SiO2 thin film derived from polyphenylcarbosilane were investigated as a potential interlayer dielectrics for Cu interconnect technology. Polyphenylcarbosilane was synthesized from thermal rearrangement of polymethylphenylsilane around $350^{\circ}C{\sim}430^{\circ}C$. Characterization of synthesized polyphenylcarbosilane was performed with 29Si, 13C, 1H NMR, FT-IR, TG, XRD, GPC and GC analysis. From FT-IR data, the band at 1035 cm-1 is very strong and assigned to CH2 bending vibration in Si-CH2-Si group, indicating the formation of the polyphenylcarbosilane. Number average of molecular weight (Mn) of the polyphenylcarbosilane synthesized at $400^{\circ}C$ for 6hwas 2, 500 and is easily soluble in organic solvent. SiOC/SiO2 thin film was fabricated on ton-type silicon wafer by spin coating using 30wt % polyphenylcarbosilane incyclohexane. Curing of the film was performed in the air up to $400^{\circ}C$ for 2h. The thickness of the film is ranged from $1{\mu}m$ to $1.7{\mu}m$. The dielectric constant was determined from the capacitance data obtained from metal/polyphenylcarbosilane/conductive Si MIM capacitors and show a dielectric constant as low as 2.5 without added porosity. The SiOC /SiO2 thin film derived from polyphenylcarbosilane shows promising application as an interlayer dielectrics for Cu interconnect technology.

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Study of Via-Typed Air-Gap for Logic Devices Applications below 45 nm Node

  • Kim, Sang-Yong;Kim, Il-Soo;Jeong, Woo-Yang
    • Transactions on Electrical and Electronic Materials
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    • v.12 no.4
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    • pp.131-134
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    • 2011
  • Back-end-of-line using ultra low-k (ULK; k < 2.5) has been required to reduce resistive capacitance beyond 45 nmtechnologies, because micro-processing units need higher speed and density. There are two strategies to manufacture ULK inter-layer dielectric (ILD) materials using an air-gap (k = 1). The former ULK and calcinations of ILD degrade the mechanical strength and induce a high cost due to the complication of following process, such as chemical mechanical polishing and deposition of the barrier metal. In contrast, the air-gap based low-k ILD with a relatively higher density has been researched on the trench-type with activity, but it has limited application to high density devices due to its high air-gap into the next metal layer. The height of air-gap into the next metal layer was reduced by changing to the via-typed air-gap, up to about 50% compared to that of the trench-typed air-gap. The controllable ULK was easily fabricated using the via-typed air-gap. It is thought that the via-type air-gap made the better design margin like via-patterning in the area with the dense and narrow lines.

Effect of a Multi-Step Gap-Filling Process to Improve Adhesion between Low-K Films and Metal Patterns

  • Lee, Woojin;Kim, Tae Hyung;Choa, Yong-Ho
    • Korean Journal of Materials Research
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    • v.26 no.8
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    • pp.427-429
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    • 2016
  • A multi-step deposition process for the gap-filling of submicrometer trenches using dimethyldimethoxysilane (DMDMOS), $(CH_3)_2Si(OCH_3)_2$, and $C_xH_yO_z$ by plasma enhanced chemical vapor deposition (PECVD) is presented. The multi-step process consisted of pre-treatment, deposition, and post-treatment in each deposition step. We obtained low-k films with superior gap-filling properties on the trench patterns without voids or delamination. The newly developed technique for the gap-filling of submicrometer features will have a great impact on inter metal dielectric (IMD) and shallow trench isolation (STI) processes for the next generation of microelectronic devices. Moreover, this bottom up gap-fill mode is expected to be universally for other chemical vapor deposition systems.

Ceramic Actuators with PLZT Functionally Gradient Material (PLZT 경사 기능 재료를 이용한 세라믹 엑튜에이터)

  • Choi, Seung-Chul;Kim, Han-Soo;Sohn, Jeong-Ho;Kim, Hyun-Jai;Jeong, Hyeong-Jin
    • Korean Journal of Materials Research
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    • v.1 no.2
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    • pp.105-112
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    • 1991
  • In PLZT system, a new type of material for piezoelectric actuator was developed and its properties were investigated. This material consists of three layers : a piezoelectric ceramic layer, an interlayer which composition changes gradually, and another piezoelectric layer. This kind of materials is called functionally Gradient Materials(FGM). The composition of these layers were selected from the $(Pb,\;La)(Zr,\;TiO_3$ system through the concept of materials design. Sintered FGM at $1300^{\circ}C$, 2hr has an interlayer of about $20\mu\textrm{m}$ with no distorted damage. Dielectric and piezoelectic properties of FGM show intervalues of each side composition. The strain-voltage characteristics in FGM system was improved comparison with any single composition. Especially, the FGMs were fabricated which has high piezoelectric-low dielectric composition and low piezoelectric-high dielectric composition. The properties of both FGMs were significantly improved.

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Dielectric property and conduction mechanism of ultrathin zirconium oxide films

  • Chang, J.P.;Lin, Y.S.
    • Electrical & Electronic Materials
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    • v.16 no.9
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    • pp.61.1-61
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    • 2003
  • Stoichiometric, uniform, amorphous ZrO$_2$ films with an equivalent oxide thickness of ∼1.5nm and a dielectric constant of ∼18 were deposited by an atomic layer controlled deposition process on silicon for potential application in meta-oxide-semiconductor(MOS) devices. The conduction mechanism is identified as Schottky emission at low electric fields and as Poole-Frenkel emission at high electric fields. the MOS devices showed low leakage current, small hysteresis(〈50mV), and low interface state density(∼2*10e11/cm2eV). Microdiffraction and high-resolution transmission electron microscopy showed a localized monoclinic phase of ${\alpha}$-ZrO$_2$ and an amorphous interfacial ZrSi$\_$x/O$\_$y/ layer which has a correspondign dielectric constant of 11

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Low k Materials for High Frequency High Integration Modules (고주파대응 고집적 모듈용 저유전율 소재)

  • Na, Yoon-Soo;Hwang, Jong-Hee;Lim, Tae-Young;Shin, Hyo-Soon;Kim, Jong-Hee;Cho, Yong-Soo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.06a
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    • pp.328-328
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    • 2008
  • As a low K material for high frequency high integration modules, glass/ceramic composites were investigated. Glass composition were selected from $SiO_2-B_2O_3-Al_2O_3-R_2O$-RO system which having very low dielectric constant and cordierite was used as a ceramic filler. These composites were sintered at temperature range from $850^{\circ}$ to $950^{\circ}$ and XRD, SEM microstructure analysis of sintered bodies were performed for understanding sintering behavior. Any crystallization was not occurred and dense sintered bodies were attained. Dielectric and mechanical properties of these sintered glass/cordierite composites were analysed by network analyzer and UTM. Glass/ceramic composite with 50 wt% cordierite showing a dielectric constant (${\varepsilon}_r$) of 5.4, Q${\times}f_0$ (Q) of 1600 at 1 GHz and maximum bending strength of 163 MPa was attained.

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The microwave dielectric properties of $Bi_{0.97}Tm_{0.03}NbO_{4}$ doped with $V_{2}O_{5}$ (마이크로파 유전체 $Bi_{0.97}Tm_{0.03}NbO_{4}$$V_{2}O_{5}$ 첨가에 따른 유전특성)

  • Hwang, Chang-Gyu;Jang, Gun-Eik
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.11a
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    • pp.350-353
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    • 2002
  • The microwave dielectric properties and the microstructures on $Bi_{0.97}Nb_{0.03}O_{4}$doped with $V_{2}O_{5}$ were systematically investigated. $Bi_{0.97}Tm_{0.03}Nb_{0.03}O_{4}$ ceramics sintered at $920-960^{\circ}C$were mainly consisted of orthorhombic and triclinic phases after addition of $V_{2}O_{5}$. The apparent density increased slightly with increasing the $V_{2}O_{5}$ addition. The dielectric $constants(\varepsilon_r)$ also increased with $V_{2}O_{5}$ addition(30-45). The $Q{\times}f_0$ values measured on $Bi_{0.97}Tm_{0.03}NbO_4$ ceramics doped with $V_{2}O_{5}$ were between 2,000 and 12,000[GHz] when the sintering temperatures are in the range of $920-960[^{\circ}C]$. It was confirmed the temperature coefficient of the resonant $frequency(\tau_f)$ can be adjusted from a positive value of $+10[ppm/^{\circ}C]$ to a negative value of $-15ppm/^{\circ}C$ by increasing the amount of $V_{2}O_{5}$. Based on our experimental results, the Bi0.97Tm0.03NbO4(added V2O5) ceramics can be applied to multilayer microwave devices at low sintering temperatures.

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Polymer Substrate Materials with Low Dielectric Loss Using Dicyclopentadienyl Bisphenol Cyanate Ester and Polyphenylene Ether (다이사이클로펜타다이에닐 비스페놀 시아네이트 에스터와 폴리페닐렌에테르를 이용한 저유전손실 고분자 기판 소재)

  • Kim, Dong-Kook;Park, Seong-Dae;Lee, Woo-Sung;Yoo, Myong-Jae;Park, Se-Hoon;Lim, Jin-Kyu;Kyoung, Jin-Bum
    • Polymer(Korea)
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    • v.31 no.6
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    • pp.474-478
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    • 2007
  • Polymer substrate materials with low dielectric loss were obtained by fabricating the composite using dicyclopentadienyl bisphenol cyanate ester oligomer and polyphenylene ether (PPE). From the analysis of the curing reaction of oligomer and catalyst, it was observed that the optimum amount of catalyst was 0.02 phr of Zn content. It was applied to the fabrication of polymer composite. By changing oligomer/PPE weight ratio, the peel strength and the gel content of the fabricated composites were measured, and then, the dielectric constant and the dissipation factor were measured in the GHz frequency range. The amount of PPE affected the peel strength and the dielectric properties of composites. However, the amount of catalyst did not affect them at all. Resulting from all experiments, we obtained polymer composite laminates haying the peel strength of above 1 kN/m and the low dissipation factor of 0.004 at 1 GHz.

High-Performance, Fully-Transparent and Top-Gated Oxide Thin-Film Transistor with High-k Gate Dielectric

  • Hwang, Yeong-Hyeon;Cho, Won-Ju
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.276-276
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    • 2014
  • High-performance, fully-transparent, and top-gated oxide thin-film transistor (TFT) was successfully fabricated with Ta2O5 high-k gate dielectric on a glass substrate. Through a self-passivation with the gate dielectric and top electrode, the top-gated oxide TFT was not affected from H2O and O2 causing the electrical instability. Heat-treated InSnO (ITO) was used as the top and source/drain electrode with a low resistance and a transparent property in visible region. A InGaZnO (IGZO) thin-film was used as a active channel with a broad optical bandgap of 3.72 eV and transparent property. In addition, using a X-ray diffraction, amorphous phase of IGZO thin-film was observed until it was heat-treated at 500 oC. The fabricated device was demonstrated that an applied electric field efficiently controlled electron transfer in the IGZO active channel using the Ta2O5 gate dielectric. With the transparent ITO electrodes and IGZO active channel, the fabricated oxide TFT on a glass substrate showed optical transparency and high carrier mobility. These results expected that the top-gated oxide TFT with the high-k gate dielectric accelerates the realization of presence of fully-transparent electronics.

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