• Title/Summary/Keyword: low-density parity-check codes

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Combined Horizontal-Vertical Serial BP Decoding of GLDPC Codes with Binary Cyclic Codes (이진 순환 부호를 쓰는 GLDPC 부호의 수평-수직 결합 직렬 복호)

  • Chung, Kyuhyuk
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.39A no.10
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    • pp.585-592
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    • 2014
  • It is well known that serial belief propagation (BP) decoding for low-density parity-check (LDPC) codes achieves faster convergence without any increase of decoding complexity per iteration and bit error rate (BER) performance loss than standard parallel BP (PBP) decoding. Serial BP (SBP) decoding, such as horizontal SBP (H-SBP) decoding or vertical SBP (V-SBP) decoding, updates check nodes or variable nodes faster than standard PBP decoding within a single iteration. In this paper, we propose combined horizontal-vertical SBP (CHV-SBP) decoding. By the same reasoning, CHV-SBP decoding updates check nodes or variable nodes faster than SBP decoding within a serialized step in an iteration. CHV-SBP decoding achieves faster convergence than H-SBP or V-SBP decoding. We compare these decoding schemes in details. We also show in simulations that the convergence rate, in iterations, for CHV-SBP decoding is about $\frac{1}{6}$ of that for standard PBP decoding, while the convergence rate for SBP decoding is about $\frac{1}{2}$ of that for standard PBP decoding. In simulations, we use recently proposed generalized LDPC (GLDPC) codes with binary cyclic codes (BCC).

Performance Comparison of LDPC codes with Different Soft-output Algorithm for High Density Optical Recording Channel (고밀도 광 기록 채널에서 LDPC 부호의 연판정 출력 알고리즘별 성능비교)

  • Lee, Bong-Il;Lee, Jae-Jin
    • Proceedings of the IEEK Conference
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    • 2008.06a
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    • pp.891-892
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    • 2008
  • 본 논문에서는 최근 주목받고 있는 에러 정정 기법 중 하나인 LDPC(Low Density Parity Check) 부호를 광 기록 채널(Optical Recording Channel)에 적용해 보았고 이때 사용되는 연판정 출력 알고리즘으로 MAP과 SOVA를 이용하여 성능을 비교하였다.

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Study on the Construction Method of QC LDPC Codes in ST-BICM Systems for Full Diversity (시공간 비트 인터리브된 부호화 변조 시스템에서 최대 다이버시티를 달성하기 위한 준순환 저밀도 패리티 검사 부호의 생성 연구)

  • Kim, Sung-Hwan
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.37 no.3A
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    • pp.151-156
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    • 2012
  • In this paper, design of quasi-cyclic(QC) low-density parity-check codes is proposed to have full diversity for space-time bit-interleaved coded modulation(ST-BICM) systems. Necessary and sufficient conditions that the proposed scheme has full diversity are proved as the condition that submatrices corresponding to the system part of codewords are invertible. And new construction method of binary invertible matrices for QC LDPC codes in ST-BICM systems are also proposed and modification for parity-check matrices are also explained.

Performance of Noise-Predictive Turbo Equalization for PMR Channel (수직자기기록 채널에서 잡음 예측 터보 등화기의 성능)

  • Kim, Jin-Young;Lee, Jae-Jin
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.33 no.10C
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    • pp.758-763
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    • 2008
  • We introduce a noise-predictive turbo equalization using noise filter in perpendicular magnetic recording(PMR) channel. The noise filter mitigates the colored noise in high-density PMR channel. In this paper, the channel detectors used are SOVA (Soft Output Viterbi Algorithm) and BCJR algorithm which proposed by Bahl et al., and the outer decoder used is LDPC (Low Density Parity Check) code that is implemented by sum-product algorithm. Two kinds of LDPC codes are experimented. One is the 0.5Kbyte (4336,4096) LDPC code with the code rate of 0.94, and the other is 1Kbyte (8432,8192) LDPC code with the code rate of 0.97.

Reduced Complexity-and-Latency Variable-to-Check Residual Belief Propagation for LDPC Codes (LDPC 부호를 위한 복잡도와 대기시간을 낮춘 VCRBP 알고리즘)

  • Kim, Jung-Hyun;Song, Hong-Yeop
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.34 no.6C
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    • pp.571-577
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    • 2009
  • This paper proposes some new improved versions of node-wise VCRBP algorithm for low-density parity-check (LDPC) codes, called forced-convergence node-wise VCRBP algorithm and sign based node-wise VCRBP, both of which significantly reduce the decoding complexity and latency, with only negligible deterioration in error correcting performance.

Performance of Run-length Limited Coded Parity of Soft LDPC Code for Perpendicular Magnetic Recording Channel (런-길이 제한 부호를 패리티로 사용한 연판정 LDPC 부호의 수직자기기록 채널 성능)

  • Kim, Jinyoung;Lee, Jaejin
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.38A no.9
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    • pp.744-749
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    • 2013
  • We propose soft user data input on LDPC codes with parity encoded by the (1, 7) run length limited (RLL) code for perpendicular magnetic recording channel. The user data are encoded by maximum transition run (MTR) (3;11) code. In order to minimize the loss of code rate, the (1, 7) RLL code only encode the parity of LDPC. Also, to increase performance, we propose only user data part applied soft output Viterbi algorithm (SOVA). The performance using the SOVA showed good performance lower than 26 dB. In contrast, it showed worse performance high than 26 dB. This is because of incorrect soft information by high jitter noise and two different input types for LDPC decoder.

Burst Error Performance of LDPC codes on Perpendicular Magnetic Recording Channel (수직 자기기록 채널에서 연집에러에 따른 LDPC 부호의 성능)

  • Kim, Sang-In;Lee, Jae-Jin
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.33 no.11C
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    • pp.868-873
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    • 2008
  • In this paper, we analyze the burst error performance of LDPC codes on perpendicular magnetic recording(PMR) channel. When burst error is generated on PMR channel, we use channel state information(CSI) to set the LLR information of channel detector zero. We consider the rate 0.94 LDPC codes and use SOVA as channel detector with low complexity.

Design of a Low-Power LDPC Decoder by Reducing Decoding Iterations (반복 복호 횟수 감소를 통한 저전력 LDPC 복호기 설계)

  • Lee, Jun-Ho;Park, Chang-Soo;Hwang, Sun-Young
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.32 no.9C
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    • pp.801-809
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    • 2007
  • LDPC Low Density Parity Check) code, which is an error correcting code determined to be applied to the 4th generation mobile communication systems, requires a heavy computational complexity due to iterative decodings to achieve a high BER performance. This paper proposes an algorithm to reduce the number of decoding iterations to increase performance of the decoder in decoding latency and power consumption. Measuring changes between the current decoded LLR values and previous ones, the proposed algorithm predicts directions of the value changes. Based on the prediction, the algorithm inverts the sign bits of the LLR values to speed up convergence, which means parity check equation is satisfied. Simulation results show that the number of iterations has been reduced by about 33% without BER performance degradation in the proposed decoder, and the power consumption has also been decreased in proportional to the amount of the reduced decoding iterations.

Estimating BP Decoding Performance of Moderate-Length Irregular LDPC Codes with Sphere Bounds

  • Chung, Kyu-Hyuk
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.7C
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    • pp.594-597
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    • 2010
  • This paper estimates belief-propagation (BP) decoding performance of moderate-length irregular low-density parity-check (LDPC) codes with sphere bounds. We note that for moderate-length($10^3{\leq}N{\leq}4\times10^3$) irregular LDPC codes, BP decoding performance, which is much worse than maximum likelihood (ML) decoding performance, is well matched with one of loose upper bounds, i.e., sphere bounds. We introduce the sphere bounding technique for particular codes, not average bounds. The sphere bounding estimation technique is validated by simulation results. It is also shown that sphere bounds and BP decoding performance of irregular LDPC codes are very close at bit-error-rates (BERs) $P_b$ of practical importance($10^{-5}{\leq}P_b{\leq}10^{-4}$).

A Multi-mode LDPC Decoder for IEEE 802.16e Mobile WiMAX

  • Shin, Kyung-Wook;Kim, Hae-Ju
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.12 no.1
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    • pp.24-33
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    • 2012
  • This paper describes a multi-mode LDPC decoder which supports 19 block lengths and 6 code rates of Quasi-Cyclic LDPC code for Mobile WiMAX system. To achieve an efficient implementation of 114 operation modes, some design optimizations are considered including block-serial layered decoding scheme, a memory reduction technique based on the min-sum decoding algorithm and a novel method for generating the cyclic shift values of parity check matrix. From fixed-point simulations, decoding performance and optimal hardware parameters are analyzed. The designed LDPC decoder is verified by FPGA implementation, and synthesized with a $0.18-{\mu}m$ CMOS cell library. It has 380,000 gates and 52,992 bits RAM, and the estimated throughput is about 164 ~ 222 Mbps at 56 MHz@1.8 V.