• 제목/요약/키워드: low voltage circuit design

검색결과 538건 처리시간 0.038초

LED Driver IC를 위한 고전압 전류감지 회로 설계 (A High-Voltage Current-Sensing Circuit for LED Driver IC)

  • 민준식;노보미;김의진;김영석
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2010년도 하계학술대회 논문집
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    • pp.14-14
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    • 2010
  • A high voltage current sensing circuit for LED driver IC is designed and verfied by Cadence SPECTRE simulations. The current mirror pair, power and sensing MOSFETs with size ratio of K, is used in our on-chip current sensing circuit. Very low drain voltages of the current mirror pair should be matched to give accurate current sensing, so a folded-cascode opamp with a PMOS input pair is used in our design. A high voltage high side LDMOST switch is used between the current sensing circuit and power MOSFET to protect the current sensing circuit from the high output voltage. Simulation results using 0.35um BCD process show that current sensing is accurate with properly frequency compensated opamp.

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SVC를 위한 새로운 이중접속방식의 멀티스텝 인버터 (New Double-Connected Multi-Step Inverter for SVC)

  • 최세완;양승욱;김기용
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 1999년도 전력전자학술대회 논문집
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    • pp.460-463
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    • 1999
  • A new multi-step voltage source inverter is proposed in this paper. The proposed scheme is composed of the double-connected 12-step inverter with an auxiliary circuit. The auxiliary circuit includes two voltage dividing capacitors, two switching devices and a low KVA autotransformer. The resultant system is shown to be a 24-step inverter suitable for large scale SVC applications in which the PWM method can not be employed. The design parameters are derived from the analysis of voltages and currents by means of switching functions. The simulation results verify the proposed concept.

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배선용 차단기의 전자 반발력에 관한 연구 (Analysis of Electromagnetic Repulse Forces of MCCB)

  • 김길수;임기조;강성화;조현길
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2001년도 추계학술대회 논문집
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    • pp.593-596
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    • 2001
  • It is necessary for calculation of repulsion forces acting on the closed electric contacts flowing over-current, e.g. inrush current and overload currents, to do optimum design of switching devices. In this paper, the farces and flux densities generated by currents at the contact point when circuit breakers are in closed state are obtained by using 3D finite element methode. To be convinced of the results, we measure electrogmanetic repulsion forces on contacts by measuring voltage between opened contacts in MCCB.

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고온 초전도 케이블의 퀜치 보호를 위한 검출기 설계 (Design of quench detector for protection of HTS cable)

  • 최용선;황시돌;임성우;최효상;현옥배
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2002년도 하계학술대회 논문집 B
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    • pp.958-960
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    • 2002
  • High Temperature Superconducting (HTS) devices make it possible to operate with no electrical loss by resistance. If, however, the applied current is over its critical current, the phase of HTS devices is changed to normal state, so called, quench. In this case, since resistance of HTS is increased abruptly, it can not be avoidable to damage the whole apparatus. In this study, quench detector to protect HTS devices was proposed. We designed the quench detecting circuit and tested the performance of the circuit. The detecting circuit was consisted of Op-Amp and low pass filter etc, to detect very low voltage around $1{\mu}V$. The circuit detected effectively the low voltage when over current is applied to HTS tapes. At the next step, we are going to apply and test the circuit to protect the prototype HTS cable.

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넓은 출력 전압 범위를 갖는 위상동기루프를 위한 저전압 Charge Pump 회로 설계 (The Design of a Low Power and Wide Swing Charge Pump Circuit for Phase Locked Loop)

  • 부영건;고동현;김상우;박준성;이강윤
    • 대한전자공학회논문지SD
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    • 제45권8호
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    • pp.44-47
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    • 2008
  • 본 논문에서는 UWB PLL charge pump 의 충/방전 전류오차를 최소화하기 위한 회로를 제안하였다. Common-gate 와 Common-source 증폭기를 추가한 피드백 전압 조정기를 구성하여 높은 응답성을 가지는 charge pump를 설계하였다. 제안한 회로는 넓은 동작 영역을 갖으며, 낮은 전원 전압으로도 뛰어난 성능을 보인다. 본 회로는 1.2V 공급 전압과 IBM 0.13um CMOS 공정으로 집적되었다. 설계의 효율성을 평가하기 위해 참고 논문의 다른 회로와 성능을 대조하였다.

Analysis and Design of a Soft-Switched PWM Sepic DC-DC Converter

  • Kim, In-Dong;Kim, Jin-Young;Nho, Eui-Cheol;Kim, Heung-Geun
    • Journal of Power Electronics
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    • 제10권5호
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    • pp.461-467
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    • 2010
  • This paper proposes a new soft-switched Sepic converter. It has low switching losses and low conduction losses due to its auxiliary communicated circuit and synchronous rectifier operation, respectively. Because of its positive and buck/boost-like DC voltage transfer function (M=D/(1-D)), the proposed converter is desirable for use in distributed power systems. The proposed converter has versions both with and without a transformer. The paper also suggests some design guidelines in terms of the power circuit and the control loop for the proposed converter.

새로운 상호결합 이득증가형 적분기를 이용한 1.8V 200MHz대역 CMOS 전류모드 저역통과 능동필터 설계 (Design of A 1.8V 200MHz band CMOS Current-mode Lowpass Active Filter with A New Cross-coupled Gain-boosting Integrator)

  • 방준호
    • 전기학회논문지
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    • 제57권7호
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    • pp.1254-1259
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    • 2008
  • A new CMOS current-mode integrator for low-voltage analog integrated circuit design is presented. The proposed current-mode integrator is based on cross-coupled gain-boosting topology. When it is compared with that of the typical current-mirror type current-mode integrator, the proposed current-mode integrator achieves high current gain and unity gain frequency with the same transistor size. As a application circuit of the proposed integrator, we designed the 1.8V 200MHz band current-mode lowpass filter. These are verified by Hspice simulation using $0.18{\mu}m$ CMOS technology.

고속 저 전압 BiCMOS LVDS 회로 설계에 관한 연구 (A Study on Design of High Speed-Low Voltage LVDS Driver Circuit Using BiCMOS Technology)

  • 이재현;육승범;김귀동;권종기;구용서
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2006년도 하계종합학술대회
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    • pp.621-622
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    • 2006
  • This paper presents the design of LVDS(Low-Voltage-Differential-Signaling) driver circuit for Gb/s-per-pin operation using BiCMOS process technology. To reduce chip area, LVDS driver's switching devices were replaced with lateral bipolar devices. The designed lateral bipolar transister's common emitter current gain($\beta$) is 20 and device's emitter size is 2*10um. Also the proposed LVDS driver is operated at 2.5V and the maximum data rate is 2.8Gb/s approximately.

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단일전력단으로 구성된 AC/DC 풀 브리지 컨버터에 관한 연구 (A Study on AC/DC Full Bridge Converter With Single Stage Circuit)

  • 안병무;김용;김필수;임남혁;장성원
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2000년도 하계학술대회 논문집 B
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    • pp.1296-1299
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    • 2000
  • A single stage AC/DC converter based on a full bridge topology suitable for high frequency soft switching converter applications is proposed. The proposed converter has high power factor, zero voltage switching, low noise and high efficiency. A pulse width modulation control is employed to reduce the switching and rectification losses respectively. This proposal converter has simple structure and low cost, The modelling and detailed analysis are performed to derive the design equations, a prototype converter has been designed and experimented. The new converter is attractive for high-voltage, high-power applications where IGBT's are predominantly used as the power switches. The principle of operation, features, and design are verified on a 1.5kW, 30kHz, IGBT based experimental circuit.

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낮은 드레인 전압을 가지는 13.56 MHz 고효율 Class E 전력증폭기 (13.56 MHz High Efficiency Class E Power Amplifier with Low Drain Voltage)

  • 이예린;정진호
    • 한국전자파학회논문지
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    • 제26권6호
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    • pp.593-596
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    • 2015
  • 본 논문은 무선전력전송 시스템에 활용할 수 있도록 낮은 드레인 전압에서 높은 효율을 가지는 class E 전력증폭기를 설계하였다. 붕괴전압이 40 V인 Si MOSFET을 이용하여 드레인 바이어스 전압이 12.5 V인 13.56 MHz 전력증폭기를 설계하였다. 출력 전력 및 효율을 개선하기 위하여 품질계수가 우수한 솔레노이드 인덕터를 제작하여 출력 정합회로에 사용하였다. 발진 방지와 간단한 회로 구성을 위하여 인덕터와 저항으로 입력 정합회로를 구성하였다. 측정 결과, 제작된 전력증폭기는 13.56 MHz에서 38.6 dBm의 출력전력과 16.6 dB의 전력이득, 그리고 89.3 %의 높은 전력부가효율을 보였다.