• Title/Summary/Keyword: low voltage circuit design

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A High-Voltage Current-Sensing Circuit for LED Driver IC (LED Driver IC를 위한 고전압 전류감지 회로 설계)

  • Min, Jun-Sik;No, Bo-Mi;Kim, Yeo-Jin;Kim, Yeong-Seuk
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2010.06a
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    • pp.14-14
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    • 2010
  • A high voltage current sensing circuit for LED driver IC is designed and verfied by Cadence SPECTRE simulations. The current mirror pair, power and sensing MOSFETs with size ratio of K, is used in our on-chip current sensing circuit. Very low drain voltages of the current mirror pair should be matched to give accurate current sensing, so a folded-cascode opamp with a PMOS input pair is used in our design. A high voltage high side LDMOST switch is used between the current sensing circuit and power MOSFET to protect the current sensing circuit from the high output voltage. Simulation results using 0.35um BCD process show that current sensing is accurate with properly frequency compensated opamp.

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New Double-Connected Multi-Step Inverter for SVC (SVC를 위한 새로운 이중접속방식의 멀티스텝 인버터)

  • 최세완;양승욱;김기용
    • Proceedings of the KIPE Conference
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    • 1999.07a
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    • pp.460-463
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    • 1999
  • A new multi-step voltage source inverter is proposed in this paper. The proposed scheme is composed of the double-connected 12-step inverter with an auxiliary circuit. The auxiliary circuit includes two voltage dividing capacitors, two switching devices and a low KVA autotransformer. The resultant system is shown to be a 24-step inverter suitable for large scale SVC applications in which the PWM method can not be employed. The design parameters are derived from the analysis of voltages and currents by means of switching functions. The simulation results verify the proposed concept.

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Analysis of Electromagnetic Repulse Forces of MCCB (배선용 차단기의 전자 반발력에 관한 연구)

  • 김길수;임기조;강성화;조현길
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.11a
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    • pp.593-596
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    • 2001
  • It is necessary for calculation of repulsion forces acting on the closed electric contacts flowing over-current, e.g. inrush current and overload currents, to do optimum design of switching devices. In this paper, the farces and flux densities generated by currents at the contact point when circuit breakers are in closed state are obtained by using 3D finite element methode. To be convinced of the results, we measure electrogmanetic repulsion forces on contacts by measuring voltage between opened contacts in MCCB.

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Design of quench detector for protection of HTS cable (고온 초전도 케이블의 퀜치 보호를 위한 검출기 설계)

  • Choi, Yong-Sun;Hwang, Si-Dole;Yim, Seong-Woo;Choi, Hyo-Sang;Hyun, Ok-Bea
    • Proceedings of the KIEE Conference
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    • 2002.07b
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    • pp.958-960
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    • 2002
  • High Temperature Superconducting (HTS) devices make it possible to operate with no electrical loss by resistance. If, however, the applied current is over its critical current, the phase of HTS devices is changed to normal state, so called, quench. In this case, since resistance of HTS is increased abruptly, it can not be avoidable to damage the whole apparatus. In this study, quench detector to protect HTS devices was proposed. We designed the quench detecting circuit and tested the performance of the circuit. The detecting circuit was consisted of Op-Amp and low pass filter etc, to detect very low voltage around $1{\mu}V$. The circuit detected effectively the low voltage when over current is applied to HTS tapes. At the next step, we are going to apply and test the circuit to protect the prototype HTS cable.

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The Design of a Low Power and Wide Swing Charge Pump Circuit for Phase Locked Loop (넓은 출력 전압 범위를 갖는 위상동기루프를 위한 저전압 Charge Pump 회로 설계)

  • Pu, Young-Gun;Ko, Dong-Hyun;Kim, Sang-Woo;Park, Joon-Sung;Lee, Kang-Yoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.8
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    • pp.44-47
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    • 2008
  • In this paper, a new circuit is proposed to minimize the charging and discharging current mismatch in charge pump for UWB PLL application. By adding a common-gate and a common-source amplifier and building the feedback voltage regulator, the high driving charge pump currents are accomplished. The proposed circuit has a wide operation voltage range, which ensures its good performance under the low power supply. The circuit has been implemented in an IBM 0.13um CMOS technology with 1.2V power supply. To evaluate the design effectiveness, some comparisons have been conducted against other circuits in the literature.

Analysis and Design of a Soft-Switched PWM Sepic DC-DC Converter

  • Kim, In-Dong;Kim, Jin-Young;Nho, Eui-Cheol;Kim, Heung-Geun
    • Journal of Power Electronics
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    • v.10 no.5
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    • pp.461-467
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    • 2010
  • This paper proposes a new soft-switched Sepic converter. It has low switching losses and low conduction losses due to its auxiliary communicated circuit and synchronous rectifier operation, respectively. Because of its positive and buck/boost-like DC voltage transfer function (M=D/(1-D)), the proposed converter is desirable for use in distributed power systems. The proposed converter has versions both with and without a transformer. The paper also suggests some design guidelines in terms of the power circuit and the control loop for the proposed converter.

Design of A 1.8V 200MHz band CMOS Current-mode Lowpass Active Filter with A New Cross-coupled Gain-boosting Integrator (새로운 상호결합 이득증가형 적분기를 이용한 1.8V 200MHz대역 CMOS 전류모드 저역통과 능동필터 설계)

  • Bang, Jun-Ho
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.57 no.7
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    • pp.1254-1259
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    • 2008
  • A new CMOS current-mode integrator for low-voltage analog integrated circuit design is presented. The proposed current-mode integrator is based on cross-coupled gain-boosting topology. When it is compared with that of the typical current-mirror type current-mode integrator, the proposed current-mode integrator achieves high current gain and unity gain frequency with the same transistor size. As a application circuit of the proposed integrator, we designed the 1.8V 200MHz band current-mode lowpass filter. These are verified by Hspice simulation using $0.18{\mu}m$ CMOS technology.

A Study on Design of High Speed-Low Voltage LVDS Driver Circuit Using BiCMOS Technology (고속 저 전압 BiCMOS LVDS 회로 설계에 관한 연구)

  • Lee, Jae-Hyun;Yuk, Seung-Bum;Koo, Yong-Seo;Kim, Kui-Dong;Kwon, Jong-Ki
    • Proceedings of the IEEK Conference
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    • 2006.06a
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    • pp.621-622
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    • 2006
  • This paper presents the design of LVDS(Low-Voltage-Differential-Signaling) driver circuit for Gb/s-per-pin operation using BiCMOS process technology. To reduce chip area, LVDS driver's switching devices were replaced with lateral bipolar devices. The designed lateral bipolar transister's common emitter current gain($\beta$) is 20 and device's emitter size is 2*10um. Also the proposed LVDS driver is operated at 2.5V and the maximum data rate is 2.8Gb/s approximately.

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A Study on AC/DC Full Bridge Converter With Single Stage Circuit (단일전력단으로 구성된 AC/DC 풀 브리지 컨버터에 관한 연구)

  • Ahn, Byung-Moo;Kim, Yong;Kim, Pil-Soo;Lim, Nam-Hyuk;Chang, Sung-Won
    • Proceedings of the KIEE Conference
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    • 2000.07b
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    • pp.1296-1299
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    • 2000
  • A single stage AC/DC converter based on a full bridge topology suitable for high frequency soft switching converter applications is proposed. The proposed converter has high power factor, zero voltage switching, low noise and high efficiency. A pulse width modulation control is employed to reduce the switching and rectification losses respectively. This proposal converter has simple structure and low cost, The modelling and detailed analysis are performed to derive the design equations, a prototype converter has been designed and experimented. The new converter is attractive for high-voltage, high-power applications where IGBT's are predominantly used as the power switches. The principle of operation, features, and design are verified on a 1.5kW, 30kHz, IGBT based experimental circuit.

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13.56 MHz High Efficiency Class E Power Amplifier with Low Drain Voltage (낮은 드레인 전압을 가지는 13.56 MHz 고효율 Class E 전력증폭기)

  • Yi, Yearin;Jeong, Jinho
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.26 no.6
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    • pp.593-596
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    • 2015
  • In this paper, we design a high efficiency class E power amplifier operating at low drain bias voltage for wireless power transfers. A 13.56 MHz power amplifier is designed at drain bias voltage of 12.5 V using Si MOSFET with the breakdown voltage of 40 V. High quality-factor solenoidal inductor is designed and fabricated for use in output matching circuit to improve output power and efficiency. Input matching circuit simply consists of resistor and inductor to reduce the circuit area and improve the stability. The fabricated power amplifier shows the measured output power of 38.6 dBm with the gain of 16.6 dB and power added efficiency of 89.3 % at 13.56 MHz.