• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.461-464
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• 2008

We have developed low voltage driving red phosphorescent organic light-emitting devices using a new electron transport layer. $Ir(piq)_3$ and CBP were used as a phosphorescent dopant and an emission host, respectively. The device exhibits a luminance of $1000\;cd/m^2$ at a voltage of 2.8 V. This high luminance at low voltage results from a high electron conduction behavior of the new electron transport layer.

• IEIE Transactions on Smart Processing and Computing
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• v.5 no.1
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• pp.10-16
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• 2016

In this paper, a design for a fully digital voltage sensor using a 32-nm fin-type field-effect transistor (FinFET) is presented. A new characteristic of the double gate p-type FinFET (p-FinFET) is examined and proven appropriate for sensing voltage variations. On the basis of this characteristic, a novel technique for designing low-power voltage-to-time converters is presented. Then, we develop a digital voltage sensor with a voltage range of 0.7 to 1.1V at a 50-mV resolution. The performance of the proposed sensor is evaluated under a range of voltages and process variations using Simulation Program with Integrated Circuit Emphasis (SPICE) simulations, and the sensor is proven capable of operating under ultra-low power consumption, high linearity, and fairly high-frequency conditions (i.e., 100 MHz).

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.22 no.1
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• pp.124-131
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• 2008

Recently underground electrical power distribution is increased because people attach importance to aesthetics of the downtown areas. Lew-voltage handhole of underground distribution line for joint and branch point is mainly installed at the sidewalk. So, pedestrian can get a electric shock if fault is occurred in the low-voltage handhole. Furthermore the street was flooded by recently an unusual change in the weather. Fault is occurred in the low-voltage handhole that may create a shock hazard for the human body because a person's body resistance lower due to effect of water. This paper analyses causes of electric shock accidents and check results at the low-voltage handhole. At a result of analysis, the causes of electric shock accidents in domestic and foreign low-voltage handhole are same but environmental conditions of low-voltage handhole are different In the future, the analytical data can be applied to prevent the electric shock at the low-voltage handhole, and can be used to basic data for the improving installment of low-voltage handhole.

• KIEE International Transactions on Electrophysics and Applications
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• v.2C no.5
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• pp.253-257
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• 2002

A new Current-Controlled Driving Method that can drive AC PDPs with low voltage and high luminous efficiency for the sustaining period is presented. In this driving method, the voltage source is connected to a storage capacitor and the stored voltage is delivered to the panel through LC resonance. Thus, this driving method can drive the panel with a voltage source as low as about half of the voltage necessary in the conventional driving methods. The discharge current flowing into the AC PDP is limited in this method. Thus, the power consumption for the discharge is reduced and the discharge input power to output luminance efficiency is improved. Experimental results using this driving method showed that we could drive an AC PDP with a voltage source as low as 146V and that high luminous efficiency of 1.33 1m／W can be achieved.

• Journal of IKEEE
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• v.10 no.2 s.19
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• pp.149-155
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• 2006

In this study, the design of low voltage DC-DC converter with low triggering ESD (Electro-Static Discharge) protection circuit was investigated. The purpose of this paper is design optimization for low voltage(2.5V to 5.5V input range) DC-DC converter using CMOS switch. In CMOS switch environment, a dominant loss component is not switching loss but conduction loss at 1.2MHz switching frequency. In this study a constant frequency PWM converter with synchronous rectifier is used. And zener Triggered SCR device to protect the ESD phenomenon was designed. This structure reduces the trigger voltage by making the zener junction between the lateral PNP and base of lateral NPN in SCR structure. The triggering voltage was simulated to 8V.

• Journal of Electrical Engineering and Technology
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• v.2 no.1
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• pp.29-34
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• 2007

The input and output impedances in a low voltage distribution system is one of the most important matters for power line communication because from the viewpoint of communication, the attenuation characteristic of the high frequency signals is greatly caused by impedance mismatch during sending and receiving. The frequency range is from 1MHz to 30MHz. Therefore, this paper investigates the input and output impedances in order to understand the characteristic of high frequency signals in the low voltage distribution system between a pole transformer and an end user. For power line communication, the model of Korea's low voltage distribution system is proposed in a residential area and then the low voltage distribution system is set up in a laboratory. In the low voltage distribution system, S parameters are measured by using a network analyzer. Finally, input and output impedances are calculated using S parameters.

• Journal of Electrical Engineering and Technology
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• v.11 no.1
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• pp.125-134
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• 2016

We propose an efficient high voltage level shifter for a high side Buck converter driving a light-emitting diode (LED) lamp. The proposed circuit is comprised of a low voltage pulse width modulation (PWM) signal driver, a coupling capacitor, a resistor, and a diode. The proposed method uses a property of a PWM signal. The property is that the signal repeatedly transits between a low and high level at a certain frequency. A low voltage PWM signal is boosted to a high voltage PWM signal through a coupling capacitor using the property of the PWM signal, and the boosted high voltage PWM signal drives a p-channel metal oxide semiconductor (PMOS) transistor on the high side Buck converter. Experimental results show that the proposed level shifter boosts a low voltage (0 to 20 V) PWM signal at 125 kHz to a high voltage (370 to 380 V) PWM signal with a duty ratio of up to 0.9941.

• Journal of the Korean Society of Safety
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• v.6 no.2
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• pp.15-20
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• 1991

In this paper, we have investigated the effect of organic additives and prestressed D C. voltage on the impulse tree initiation in low density polyethylene. The five klnds of organic compounds was selected for the purpose of inhibiting tree initiation and 10 wt % of each additive was mixed in low density polyethylene. The positive or negative impulse voltage was applied after prestressed D.C. voltage was applied in order to investigate the effect of the space charge influenced on tree initiation. The lengths of tree initiation in case of belng same polarity between prestressed D.C. voltage and impulse voltage were longer than those in case of being different polarity between prestressed D.C. voltage and impulse voltage. When the polarity prestressed D.C. voltage was the different plarity of impulse voltage, the length of tree initiation increased with increasing the prestressed D.C. voltage and decreasing the rest time Among the organic additives used in this paper, the m-cresol can be shown to be the most effective inhibiter to tree initiation.

• Journal of Power Electronics
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• v.16 no.1
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• pp.1-8
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• 2016

Dead time is typically incorporated in voltage source inverter systems to prevent short circuit cases. However, dead time causes an error between the output voltage and reference voltage. Hence, voltage equation-based algorithms, such as motor parameter estimation and back electromotive force (EMF)-based sensorless algorithms, are prone to estimation errors. Several dead-time compensation methods have been developed to reduce output voltage errors. However, voltage errors are still common in zero current crossing areas, and an effect of the error is much worse in a low speed region. Therefore, employing voltage equation-based algorithms in low speed regions is difficult. This study analyzes the conventional dead-time compensation method and output voltage errors in low speed operation areas. A current shaping method that can reduce output voltage errors is also proposed. Experimental results prove that the proposed method reduces voltage errors and improves the accuracy of the parameter estimation method and the performance of the back EMF-based sensorless algorithm.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.301-304
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• 2001

The analog multiplier is very useful building block in many circuits such as filter, frequency-shifter, and modulators. In recent year, The main design issue of circuit designer is low-voltage/low-power system design, because of all systems are recommended very integrated system and portable system In this paper, the proposed the four-quadrant analog multiplier is using the bulk-driven techniques. The bulk-driven technique is very useful technique in low-voltage system, compare with gate-driven technique. therefore the proposed analog multiplier is operated in 1V supply voltage. And the proposed analog multiplier is low power dissipation compare with the others. therefor the proposed analog multiplier is convenient in low-voltage/low-power in system.