• Title/Summary/Keyword: low power mode

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A Current-mode peak detector circuit

  • Riewruja, V.;Linthong, A.;Kaewpoonsuk, A.;Guntapong, R.;Supaph, S.
    • 제어로봇시스템학회:학술대회논문집
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    • 2000.10a
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    • pp.512-512
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    • 2000
  • In this article, a current mode peak detector circuit is presented. The simple circuit configuration comprises four MOS transistors and one external capacitor. The realization method is suitable fur fabrication using CMOS technology and all transistors are operated in their saturation region. The proposed circuit exhibits a very low drop rate and provides high accuracy, high-speed and wide dynamic range. The proposed circuit has very low power dissipation and operates using a single 2.5V supply. Simulation results confirmed the characteristic of the proposed circuit are also included.

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Low Loss Highly Birefringent Porous Core Fiber for Single Mode Terahertz Wave Guidance

  • Habib, Md. Ahasan;Anower, Md. Shamim
    • Current Optics and Photonics
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    • v.2 no.3
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    • pp.215-220
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    • 2018
  • A novel porous-core hexagonal lattice photonic crystal fiber (PCF) is designed and analyzed for efficient terahertz (THz) wave propagation. The finite element method based Comsol v4.2 software is used for numerical analysis of the proposed fiber. A perfectly matched layer boundary condition is used to characterize the guiding properties. Rectangular air-holes are used inside the core to introduce asymmetry for attaining high birefringence. By intentionally rotating the rectangular air holes of porous core structure, an ultrahigh birefringence of 0.045 and low effective material loss of $0.086cm^{-1}$ can be obtained at the operating frequency of 0.85 THz. Moreover, single-mode properties, power fraction in air core and confinement loss of the proposed PCF are also analyzed. This is expected to be useful for wideband imaging and telecom applications.

Simulation Experiment of PEMFC Using Insulation Vessel at Low Temperature Region (저온영역에서 단열용기를 이용한 연료전지 모의 실험)

  • Jo, In-Su;Kwon, Oh-Jung;Kim, Yu;Hyun, Deok-Su;Park, Chang-Kwon;Oh, Byeong-Soo
    • Transactions of the Korean hydrogen and new energy society
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    • v.19 no.5
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    • pp.403-409
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    • 2008
  • Polymer electrolyte membrane fuel cell (PEMFC) is very interesting power source due to high power density, simple construction and operation at low temperature. But it has problems such as high cost, improvement of performance, effect of temperature and initial start at low temperature. These problems can be approached to be solved by using experiment and mathematical method which are general principles for analysis and optimization of control system for heat and hydrogen detecting management. In this paper, insulation vessel and control system for stable operation of fuel cell at low temperature were developed for experiment. The constant temperature capability and the heating time at sub-zero temperatures with insulation control system were studied by using a heating bar of 60W class. PEMFC stack which was made by 4 cells with $50\;mc^2$ active area in each cell is a thermal source. Times which take to reach constant temperature by the state of insulation vacuum were measured at variable environment temperatures. The test was performed at two conditions: heating mode and cooling mode. Constant temperature capability was better at lower environment temperature and vacuum pressure. The results of this experiment could be used as basis data about stable operation of fuel cell stack in low temperature zone.

Design of Low-Power and High-Speed Receiver for a Mobile Display Digital Interface (모바일 디스플레이 디지털 인터페이스용 저전력 고속 수신기 회로의 설계)

  • Lee, Cheon-Hyo;Kim, Jeong-Hoon;Lee, Jae-Hyung;Jin, Liyan;Yin, Yong-Hu;Jang, Ji-Hye;Kang, Min-Cheol;Li, Long-Zhen;Ha, Pan-Bong;Kim, Young-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.13 no.7
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    • pp.1379-1385
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    • 2009
  • We propose a low-power and high-speed client receiver for a mobile display digital interface (MDDI) newly in this paper. The low-power receiver is designed such that bias currents, sink and source currents, are insensitive to variations of power supply, process, temperature, and common-mode input voltage (VCM) and is able to operate at a rate of 450Mbps or above under the conditions of a power supply range of 3.0 to 3.6Vand a temperature range of -40 to 85$^{\circ}$C. And it is confirmed by a simulation result that the current dissipation is less than 500${\mu}$A. A test chip is manufactured with the Magna chip 0.35${\mu}$m CMOS process. When a test was done, the data receiver and data recovery circuits are functioning normally.

High-Speed Digital/Analog NDR ICs Based on InP RTD/HBT Technology

  • Kim, Cheol-Ho;Jeong, Yong-Sik;Kim, Tae-Ho;Choi, Sun-Kyu;Yang, Kyoung-Hoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.6 no.3
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    • pp.154-161
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    • 2006
  • This paper describes the new types of ngative differential resistance (NDR) IC applications which use a monolithic quantum-effect device technology based on the RTD/HBT heterostructure design. As a digital IC, a low-power/high-speed MOBILE (MOnostable-BIstable transition Logic Element)-based D-flip flop IC operating in a non-return-to-zero (NRZ) mode is proposed and developed. The fabricated NRZ MOBILE D-flip flop shows high speed operation up to 34 Gb/s which is the highest speed to our knowledge as a MOBILE NRZ D-flip flop, implemented by the RTD/HBT technology. As an analog IC, a 14.75 GHz RTD/HBT differential-mode voltage-controlled oscillator (VCO) with extremely low power consumption and good phase noise characteristics is designed and fabricated. The VCO shows the low dc power consumption of 0.62 mW and good F.O.M of -185 dBc/Hz. Moreover, a high-speed CML-type multi-functional logic, which operates different logic function such as inverter, NAND, NOR, AND and OR in a circuit, is proposed and designed. The operation of the proposed CML-type multi-functional logic gate is simulated up to 30 Gb/s. These results indicate the potential of the RTD based ICs for high speed digital/analog applications.

A 1.8V 2-Gb/s SLVS Transmitter with 4-lane (4-lane을 가지는 1.8V 2-Gb/s SLVS 송신단)

  • Baek, Seung-Wuk;Jang, Young-Chan
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2013.10a
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    • pp.357-360
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    • 2013
  • A 1.8V 2-Gb/s scalable low voltage signaling (SLVS) transmitter (TX) is designed for mobile applications requiring high speed and low power consumption. It consists of 4-lane TX for data transmission, 1-lane TX for a source synchronous clocking, and a 8-phase clock generator. The proposed SLVS TX has the scaling voltage swing from 50 mV to 650 mV and supports a high speed (HS) mode and a low power (LP) mode. An output impedance calibration scheme for the SVLS TX is proposed to improve the signal integrity. The proposed SLVS TX is implemented by using a $0.18-{\mu}m$ 1-poly 6-metal CMOS with a 1.8V supply. The simulated data jitter of the implemented SLVS TX is about 8.04 ps at the data rate of 2-Gbps. The area and power consumption of the 1-lane of the proposed SLVS TX are $422{\times}474{\mu}m^2$ and 5.35 mW/Gb/s, respectively.

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Power Smoothening Control of Wind Farms Based on Inertial Effect of Wind Turbine Systems

  • Nguyen, Thanh Hai;Lee, Dong-Choon;Kang, Jong-Ho
    • Journal of Electrical Engineering and Technology
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    • v.9 no.3
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    • pp.1096-1103
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    • 2014
  • This paper proposes a novel strategy for attenuating the output power fluctuation of the wind farm (WF) in a range of tens of seconds delivered to the grid, where the kinetic energy caused by the large inertia of the wind turbine systems is utilized. A control scheme of the two-level structure is applied to control the wind farm, which consists of a supervisory control of the wind farm and individual wind turbine controls. The supervisory control generates the output power reference of the wind farm, which is filtered out from the available power extracted from the wind by a low-pass filter (LPF). A lead-lag compensator is used for compensating for the phase delay of the output power reference compared with the available power. By this control strategy, when the reference power is lower than the maximum available power, some of individual wind turbines are operated in the storing mode of the kinetic energy by increasing the turbine speeds. Then, these individual wind turbines release the kinetic power by reducing the turbine speed, when the power command is higher than the available power. In addition, the pitch angle control systems of the wind turbines are also employed to limit the turbine speed not higher than the limitation value during the storing mode of kinetic energy. For coordinating the de-rated operation of the WT and the storing or releasing modes of the kinetic energy, the output power fluctuations are reduced by about 20%. The PSCAD/EMTDC simulations have been carried out for a 10-MW wind farm equipped with the permanent-magnet synchronous generator (PMSG) to verify the validity of the proposed method.

A Grid-interactive PV Generation System with the Function of the Power Quality Improvement (전력품질개선기능을 갖는 계통연계형 태양광 발전시스템)

  • Ko, Sung-Hun;Cho, Ah-Ran;Kang, Dae-Up;Park, Chun-Sung;Jeon, Chil-Hwan;Lee, Seong-Ryong
    • The Transactions of the Korean Institute of Power Electronics
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    • v.12 no.4
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    • pp.300-309
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    • 2007
  • In this paper, a grid-interactive photovoltaic (PV) system with the function of the power quality improvement is presented. The proposed system requires only one current-controlled voltage source inverter, which control the current flow at low total harmonic distortion and unity power factor, as well as simultaneously provide reactive power support. The proposed system operation has been divided into two modes (sunny and night). In night mode, the system operates to compensate the reactive power demanded by nonlinear or variation in loads. In sunny mode, the system performs power quality control (PQC) to reduce harmonic current and to improve power factor as well as maximum power point tracking (MPPT) to supply active power from the PV arrays, simultaneously. To verify the proposed system a comprehensive evaluation included simulation and experimental results are presented.

Asynchronous Circuit Design Combined with Power Switch Structure (파워 스위치 구조를 결합한 비동기 회로 설계)

  • Kim, Kyung Ki
    • Journal of Korea Society of Industrial Information Systems
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    • v.21 no.1
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    • pp.17-25
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    • 2016
  • This paper proposes an ultra-low power design methodology for asynchronous circuits which combines with power switch structure used for reducing leakage current in the synchronous circuits. Compared to existing delay-insensitive asynchronous circuits such as static NCL and semi-static NCL, the proposed methodology provides the leakage power reduction in the NULL mode due to the high Vth of the power switches and the switching power reduction at the switching moment due to the smaller area even though it has a reasonable speed penalty. Therefore, it will become a low power design methodology required for IoT system design placing more value on power than speed. In this paper, the proposed methodology has been evaluated by a $4{\times}4$ multiplier designed using 0.11 um CMOS technology, and the simulation results have been compared to the conventional asynchronous circuits in terms of circuit delay, area, switching power and leakage power.

Power Decoupling Control Method of Grid-Forming Converter: Review

  • Hyeong-Seok Lee;Yeong-Jun Choi
    • Journal of the Korea Society of Computer and Information
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    • v.28 no.12
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    • pp.221-229
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    • 2023
  • Recently, Grid-forming(GFM) converter, which offers features such as virtual inertia, damping, black start capability, and islanded mode operation in power systems, has gained significant attention. However, in low-voltage microgrids(MG), it faces challenges due to the coupling phenomenon between active and reactive power caused by the low line impedance X/R ratio and a non-negligible power angle. This power coupling issue leads to stability and performance degradation, inaccurate power sharing, and control parameter design problems for GFM converters. Therefore, this paper serves as a review study on not only control methods associated with GFM converters but also power decoupling techniques. The aim is to introduce promising control methods and enhance accessibility to future research activities by providing a critical review of power decoupling methods. Consequently, by facilitating easy access for future researchers to the study of power decoupling methods, this work is expected to contribute to the expansion of distributed power generation.