• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.17 no.9 s.112
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• pp.883-889
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• 2006

In this paper, parasitic resonance modes generated in a conductor backed coplanar wave guide(CBCPW) and stripline band pass filter(BPF) and the oscillation phenomena of a 40 GHz power amplifier module(PAM) are analyzed and several methods to suppress them are presented for low-temperature co-fired ceramic(LTCC) based millimeter-wave RF System-in-Package(SiP) applications. Parasitic rectangular wave guide(RWG) modes of the CBCPW structure are completely suppressed in the operation frequency band by decreasing the distance between its vias and by increasing the mode frequency. In the stripline structure, RWG resonance modes are clearly eliminated by removing some vias facing each other and by placing them diagonally. In the case of the 40 GHz PAM, in order to reduce a cross talk due to radiation that is generated from interconnection discontinuities, high isolation structures such as embedded DC bas lines and CPW signal lines are used and then the oscillated PAM is improved.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.1
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• pp.53-60
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• 2010

This paper presents a novel gain control system composed of a feedback circuit, Two stage Low Noise Amplifier (LNA) using 0.18 um CMOS technology for 5.2 GHz. The feedback circuit consists of the seven function blocks: peak detector, comparator, ADC, IVE(Initial Voltage Elimination) circuit, switch, storage, and current controller. We focus on detecting signal and designing storage circuit that store the previous state. The power consumption of the feedback circuit in the system can be reduced without sacrificing the gain by inserting the storage circuit. The adaptive front-end system with the feedback circuit exhibits 11.39~22.74 dB gain, and has excellent noise performance at high gain mode. Variable gain LNA consumes 5.68~6.75 mW from a 1.8 V supply voltage.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.5
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• pp.100-105
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• 2010

A multi-band low noise amplifier (LNA) is designed in 90 nm RF CMOS process for 3GPP LTE (3rd Generation Partner Project Long Term Evolution) applications. The designed multi-band LNA covers the eight frequency bands between 1.85 and 2.8 GHz. A tunable input matching circuit is realized by adopting a switched capacitor array at the LNA input stage for providing optimum performances across the wide operating band. Current steering technique is adopted for the gain control in three steps. The performances of the LNA are verified through post-layout simulations (PLS). The LNA consumes 17 mA at 1.2 V supply voltage. It shows a power gain of 26 at the normal gain mode, and provides much lower gains of 0 and -6.7 in the bypass-I and -II modes, respectively. It achieves a noise figure of 1.78 dB and a IIP3 of -12.8 dBm over the entire band.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.10
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• pp.754-764
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• 2001

Class A bipolar second-generation current conveyor (CCII) with low current-input impedance and its offset-compensated CCII for high-accuracy current-mode signal processing are proposed. The CCIIs consist of a regulated current-cell for current input, a emitter follower for voltage input, and a cascode current mirror lot current output. In these architecture, the two input stages are coupled by current mirror to reduce the current input impedance. Experiments show that the CCII has impedance of 8.4 Ω and offset voltage of 40 mV at current input terminal. To reduce this offset, the offset-compensated CCII adopts diode-connected npn and pnp transistor in the proposed CCII. Experiments show that the offset-compensated CCII has current input impedance of 2.1 Ω and offset voltage of 0.05 mV. The 3-dB cutoff frequency of the CCIIs when used as a voltage follower extends beyond 30 MHz. The power dissipation is 7.0 mW

• Journal of Korea Society of Industrial Information Systems
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• v.21 no.1
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• pp.43-50
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• 2016

In this paper, new automatic LC calibrator is proposed for realizing a passive LC filter with almost constant frequency characteristic regardless of the PVT variations. The SAW-less GPS RX front-end is implemented using a 65nm CMOS process using the proposed LC calibrator. Also, new dual-mode low noise amplifier (LNA) structure is proposed to generate the RF signal required for the LC calibrator. The characteristics of the implemented GPS RX front-end show the voltage gain of about 42.5 dB, noise figure of below 1.35 dB, the blocker input P1dB of -24 dBm in case of the worst blocker signal at 1710 MHz frequency, while it consumes 7 mA current at 1.2 V power supply voltage.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.12
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• pp.66-71
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• 2014

This paper presents an analog front-end integrated circuit (IC) for medical ultrasound imaging systems using standard $0.18-{\mu}m$ CMOS process. The proposed front-end circuit includes the transmit part which consists of 15-V high-voltage pulser operating at 2.6 MHz, and the receive part which consists of switch and a low-power low-noise preamplifier. Depending on the operation mode, the output driver in the transmit pulser can be reconfigured as the switch in the receive path and thus the area of the overall front-end IC is reduced by over 70% in comparison to previous work. The designed single-channel front-end prototype consumes less than $0.045mm^2$ of core area and can be utilized as a key building block in highly-integrated multi-array ultrasound medical imaging systems.

• Journal of Digital Contents Society
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• v.18 no.5
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• pp.803-810
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• 2017

Currently, every person possesses a smart phone due to the development of the IT industry. There is an improper situation in which a smart phone is not set in silent mode, such as a lecture room, a library, and a theatre hall. The proposed system automatically automates the function of smart phones where they are designated as a public place or etiquette area and automatically return the function of the smartphone if they deviate from the location of the site. It is also equipped with a combination of autonomous devices and services, based on Bluetooth communications, which are applied to ultra-light low-power IoT(Internet of Things) devices, and has features that allow diverse types of features and services to be added without requiring deformation of the hardware.

• Journal of IKEEE
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• v.14 no.2
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• pp.82-89
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• 2010

In this paper, a buck-boost converter using three DTMOS(Dynamic Threshold Voltage MOSFET) switching devices is presented. The efficiency of the proposed converter is higher than that of conventional buck-boost converter. DTMOS with low on-resistance is designed to decrease conduction loss. The threshold voltage of DTMOS drops as the gate voltage increases, resulting in a much higher current handling capability than standard MOSFET. In order to improve the power efficiency at the high current level, the proposed converter is controlled with PWM(pulse width modulation) method. The converter has maximum output current 300mA, input voltage 3.3V, output voltage from 700mV to 12V, 1.2MHz oscillation frequency, and maximum efficiency 90%. Moreover, the LDO(low drop-out) is designed to increase the converting efficiency at the standby mode below 1mA.

• Journal of Power Electronics
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• v.11 no.4
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• pp.408-417
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• 2011

The plug-in hybrid electric vehicles (PHEVs) are specialized hybrid electric vehicles that have the potential to obtain enough energy for average daily commuting from batteries. The PHEV battery would be recharged from the power grid at home or at work and would thus allow for a reduction in the overall fuel consumption. This paper proposes an integrated power electronics interface for PHEVs, which consists of a novel Eight-Switch Inverter (ESI) and an interleaved DC/DC converter, in order to reduce the cost, the mass and the size of the power electronics unit (PEU) with high performance at any operating mode. In the proposed configuration, a novel Eight-Switch Inverter (ESI) is able to function as a bidirectional single-phase AC/DC battery charger/ vehicle to grid (V2G) and to transfer electrical energy between the DC-link (connected to the battery) and the electric traction system as DC/AC inverter. In addition, a bidirectional-interleaved DC/DC converter with dual-loop controller is proposed for interfacing the ESI to a low-voltage battery pack in order to minimize the ripple of the battery current and to improve the efficiency of the DC system with lower inductor size. To validate the performance of the proposed configuration, the indirect field-oriented control (IFOC) based on particle swarm optimization (PSO) is proposed to optimize the efficiency of the AC drive system in PHEVs. The maximum efficiency of the motor is obtained by the evaluation of optimal rotor flux at any operating point, where the PSO is applied to evaluate the optimal flux. Moreover, an improved AC/DC controller based Proportional-Resonant Control (PRC) is proposed in order to reduce the THD of the input current in charger/V2G modes. The proposed configuration is analyzed and its performance is validated using simulated results obtained in MATLAB/ SIMULINK. Furthermore, it is experimentally validated with results obtained from the prototypes that have been developed and built in the laboratory based on TMS320F2808 DSP.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.5
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• pp.515-525
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• 2014

In this paper, we present a design and implementation of a Voltage-tuned Planar Composite Resonator Oscillator(Vt-PCRO) with a low phase noise. The designed Vt-PCRO is composed of a resonator, two phase shifters, and an amplifier. The resonator is designed using a dual mode SIW(Substrate Integrated Waveguide) resonator and has a group delay of about 40 nsec. Of the two phase shifters (PS1 and PS2), PS1 with a phase shift of $360^{\circ}$ is used for the open loop gain to satisfy oscillation condition without regard to the electrical lengths of the employed microstrip lines in the loop. PS2 with a phase shift of about $70^{\circ}$ is used to tune oscillation frequency. The amplifier is constructed using two stages to compensate for the loss of the open loop. Through the measurement of the open loop gain, the tune voltage of the PS1 can be set to satisfy the oscillation condition and the loop is then closed to form the oscillator. The oscillator with a oscillation frequency of 5.345 GHz shows a phase noise of -130.5 dBc/Hz at 100 kHz frequency offset. The oscillation power and the electrical frequency tuning range is about 3.5 dBm and about 4.2 MHz for a tuning voltage of 0~10 V, respectively.