• IEMEK Journal of Embedded Systems and Applications
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• v.13 no.3
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• pp.117-124
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• 2018

Wearable devices have become widespread. Fitness band is one of common wearable devices, providing useful functions. It helps users to monitor and collect their status such as heart rate and travel distance. Wearable devices, including fitness bands, are designed in small size and it ends up having small battery capacity. In that regard, it is necessary to expand the lifetime of wearable devices. Conventional power management scheme of wearable devices is based on DVFS Ondemand Governor and peripheral control by timeout event, such as turning off the LCD. In this paper, we propose a hybrid governor applying hardware supporting low power mode such as sleep mode to exploit the periodicity of fitness band task. In addition, we show hybrid governor outperforms in power consumption than conventional power management scheme of wearable devices based on Ondemand Governor through experiments.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.25 no.4
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• pp.270-275
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• 2012

Power MOSFET(metal oxide silicon field effect transistor) operate voltage-driven devices, design to control the large power switching device for power supply, converter, motor control, etc. But on-resistance characteristics depending on the increasing breakdown voltage spikes is a problem. So 600 V planar power MOSFET compare to 1/3 low on-resistance characteristics of super junction MOSFET structure. In this paper design to 600 V planar MOSFET and super junction MOSFET, then improvement of comparative analysis breakdown voltage and resistance characteristics. As a result, super junction MOSFET improve on about 40% on-state voltage drop performance than planar MOSFET.

• Journal of electromagnetic engineering and science
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• v.9 no.1
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• pp.32-37
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• 2009

Various Class-E CMOS power amplifiers for GSM applications are presented. A stage-convertible transformer for a dual mode power amplifier is proposed to increase efficiency in the low-output power region. An integrated passive device(IPD) process is used to reduce combiner losses. A split secondary 1:2 transformer with IPD process is designed to obtain efficient and symmetric power combining. A quasi-four-pair structure of CMOS PA is also proposed to overcome the complexities of power combining.

• Journal of information and communication convergence engineering
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• v.20 no.4
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• pp.295-302
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• 2022

This paper contains the development of a smart power device designed to collect load power data from industrial manufacturing machines, predict future variations in load power data, and detect abnormal data in advance by applying a machine learning-based prediction algorithm. The proposed load power data prediction model is implemented using a Long Short-Term Memory (LSTM) algorithm with high accuracy and relatively low complexity. The Flask and REST API are used to provide prediction results to users in a graphical interface. In addition, we present the results of experiments conducted to evaluate the performance of the proposed approach, which show that our model exhibited the highest accuracy compared with Multilayer Perceptron (MLP), Random Forest (RF), and Support Vector Machine (SVM) models. Moreover, we expect our method's accuracy could be improved by further optimizing the hyperparameter values and training the model for a longer period of time using a larger amount of data.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.1700-1701
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• 2007

DC Arc Fault Current is an electric discharge which is occurred in two opposite electrode. In this paper, DC arc detection device is designed for the display of DC arc fault current which is occurred in the local electric network with DC Power. This DC arc is one of the main causes of electric fire. Arc fault in electrical network has the characteristics of low current, high impedance and low frequency. DC Arc current detection device is designed for the display of arc fault current which has the modified arc characteristics.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.25 no.11
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• pp.1596-1602
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• 2021

Battery-operated IoT devices in IoT systems require low power consumption. In general, IoT devices enter a sleep state synchronously to reduce power consumption. A problem arises when an IoT device has to handle asynchronous user requests, as the duty cycle must be reduced to enhance response time. In this paper, we propose a new low-power-consumption scheme, called Repetitive Wake-up scheme for IoT systems of asynchronous environments such as indoor lights control. The proposed scheme can reduce power consumption by sending wake-up signals from the smartphone repetitively and by retaining the IoT device in sleep state to the smallest possible duty cycle. In the various environments with IoT devices at home or office space, we showed that the proposed scheme can reduce power consumption by up to five times compared to the existing synchronous interlocking technique.

• Proceedings of the IEEK Conference
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• 2002.07b
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• pp.932-935
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• 2002

In this paper, we introduce new FTL(Flash Translation Layer) driver algorithm that tolerate the power off errors. FTL driver is the software that provide the block device interface to the upper layer software such as file systems or application programs that using the flash memory as a block device interfaced storage. Usually, the flash memory is used as the storage devices of the mobile system due to its low power consumption and small form factor. In mobile system, the state of the power supplement is not stable, because it using the small sized battery that has limited capacity. So, a sudden power off failure can be occurred when we read or write the data on the flash memory. During the write operation, power off failure may introduce the incomplete write operation. Incomplete write operation denotes the inconsistency of the data in flash memory. To provide the stable storage facility with flash memory in mobile system, FTL should provide the fault tolerance against the power off failure. SSR (Simple Sector Remapper) is a fault tolerant FTL driver that provides block device interface and also provides tolerance against power off errors.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.33 no.2
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• pp.109-113
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• 2020

A power device is a component used as a switch or rectifier in power electronics to control high voltages. Consequently, power devices are used to improve the efficiency of electric-vehicle (EV) chargers, new energy generators, welders, and switched-mode power supplies (SMPS). Power device designs, which require high voltage, high efficiency, and high reliability, are typically based on MOSFET (metal-oxide-semiconductor field-effect transistor) and IGBT (insulated-gate bipolar transistor) structures. As a unipolar device, a MOSFET has the advantage of relatively fast switching and low tail current at turn-off compared to IGBT-based devices, which are built on bipolar structures. A superjunction structure adds a p-base region to allow a higher yield voltage due to lower R_DS (on) and field dispersion than previous p-base components, significantly reducing the total gate charge. To verify the basic characteristics of the superjunction, we worked with a planar type MOSFET and Synopsys' process simulation T-CAD tool. A basic structure of the superjunction MOSFET was produced and its changing electrical characteristics, tested under a number of environmental variables, were analyzed.

• ETRI Journal
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• v.27 no.6
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• pp.685-690
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• 2005

DC and RF characteristics of $0.15{\mu}m$ GaAs power metamorphic high electron mobility transistors (MHEMT) have been investigated. The $0.15{\mu}m{\times}100{\mu}m$ MHEMT device shows a drain saturation current of 480 mA/mm, an extrinsic transconductance of 830 mS/mm, and a threshold voltage of -0.65 V. Uniformities of the threshold voltage and the maximum extrinsic transconductance across a 4-inch wafer were 8.3% and 5.1%, respectively. The obtained cut-off frequency and maximum frequency of oscillation are 141 GHz and 243 GHz, respectively. The $8{\times}50{\mu}m$ MHEMT device shows 33.2% power-added efficiency, an 18.1 dB power gain, and a 28.2 mW output power. A very low minimum noise figure of 0.79 dB and an associated gain of 10.56 dB at 26 GHz are obtained for the power MHEMT with an indium content of 53% in the InGaAs channel. This excellent noise characteristic is attributed to the drastic reduction of gate resistance by the T-shaped gate with a wide head and improved device performance. This power MHEMT technology can be used toward 77 GHz band applications.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.1
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• pp.12-16
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• 2009

Current sensing in power semiconductors involves sensing of over-current in order to protect the device from harsh conditions. This technique is one of the most important functions in stabilizing power semiconductor device modules. The sense FET is very efficient method with low power consumption, fast sensing speed and accuracy. In this paper, we have analyzed the characteristics of proposed sense FET and optimized its electrical characteristics to apply conventional 450 V power MOSFET by numerical and simulation analysis. The proposed sense FET has the n-drift doping concentration $1.5{\times}10^{14}cm^{-3}$, size of $600{\um}m^2$ with $4.5\;{\Omega}$, and off-state leakage current below $50{\mu}A$. We offer the layout of the proposed sense FET to process actually. The offerd design and optimization methods are meaningful, which the methods can be applied to the power devices having various breakdown voltages for protection.