• IEMEK Journal of Embedded Systems and Applications
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• v.12 no.3
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• pp.131-138
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• 2017

QR/NFC tags have been utilized in various fields like exhibition, museum, and so on, but they have a drawback that they are read-only fundamentally. We devise a novel device called a smart memory tag (below mem-tag) which is supplemented with the write function through combining a flash memory into a NFC tag. A mem-tag is composed of an NFC tag, an MCU, a flash memory, a bluetooth module, and a battery, and is inter-operating with smartphones via bluetooth communication. It can be used in a bulletin board to support writing replies and in a check-in service to verify the presence of the site. What matters is that users' inter-operations are borne to be asynchronous, which leads to the energy consumption to wait for users' actions. Sleep mechanisms and asynchronous MAC protocols used in ubiquotous sensor networks cannot avoid the consumption of battery. In this paper, we propose a touch and play scheme for minimizing the consumption of battery that the MCU wakes up and PLAY when a user TOUCH the mem-tag. We implemented the system to show that our scheme lets the mem-tag work 50 times longer than the sleep and wake-up scheme.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.7 no.4
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• pp.642-648
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• 2006

In this paper, I have proposed a secure dynamic ID allocation protocol using mutual authentication on the RFID tag. Currently, there are many security protocols focused on the low-price RFID tag. The conventional low-price tags have limitation of computing power and rewritability of memory. The proposed secure dynamic ID allocation protocol targets to the high-performance RFID tags which have more powerful performance than conventional low-price tag by allocating a dynamic ID to RFID using mutual authentication based on symmetric encryption algorithm. This protocol can be used as a partial solution for ID tracing and forgery.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.15 no.6
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• pp.49-58
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• 2005

In this paper, we have proposed a secure dynamic ID allocation protocol using mutual authentication on the RFID tag. Currently, there are many security protocols focused on the low-price RFID tag. The conventional low-price tags have limitation of computing power and rewritability of memory. The proposed secure dynamic ID allocation protocol targets to the high-performance RFID tags which have more powerful performance than conventional low-price tag by allocating dynamic ID to RFID using mutual authentication based on symmetric encryption algorithm. This protocol can be used as a partial solution for ID tracing and forgery.

• Journal of Advanced Marine Engineering and Technology
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• v.39 no.4
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• pp.463-467
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• 2015

When unforeseen accidents occur in a ship, it is important to save passengers safely and remove them from the accident area quickly. To solve such a situation, site information of passengers on board always must be identified. This paper implemented a site monitoring of crews and passengers based on the BLE and PLM combination, to prepare for unexpected accidents of the ships. This system was composed of BLE tag for crews, passengers and each room, PLM networks, data server, and monitoring PC. In this system, site information derived from the tag attached to the bodies and cabins of crews and passengers are transmitted through a power line network, and monitored on the screen of a monitoring PC. The proposed system guides them into the only authorized area considering the ship security and passengers' safety, and even has a special alarm call to warn them after entering an unauthorized area. This system enables the BLE-embedded tag battery to use for a long time because the BLE consumes low electric power, and can gain an economic advantage.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2009.05a
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• pp.671-674
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• 2009

We design a low-power and low-area asynchronous EEPROM of 256 bits used in a passive UHF RFID tag chip. For a low-power solution, we use a supply voltage of 1.8V and design a Dickson charge pump using N-type Schottky diodes with a low-voltage characteristic. And we use an asynchronous interface and a separate I/O method for a low-area solution of the peripheral circuit of the designed EEPROM. And we design a Dickson charge pump using N-type Schottky diodes to reduce an area of DC-DC converter. The layout area of the designed EEPROM of 256 bits with an array of 16 rows and 16 columns using $0.18{\mu}m$ EEPROM process is $311.66{\times}490.59{\mu}m^2$.

• Journal of Korea Multimedia Society
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• v.23 no.2
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• pp.293-300
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• 2020

Since the communication networks like the Internet collapses at disaster and calamity sites, a maintenance system that can be operated offline is required for the maintenance of various facilities. In this paper, we propose a system that memory tags attached on the facilities may transmit the emergency manual to a smart-phone, and the smart phone displays it off-line. The main issue is to design low energy mode memory tags. This study presents two kinds of methods and analyzes each's energy consumption mode. The first one is to develop memory tags by using one chip, and the next one is to design memory tags by forming multi-modules. Both ways show proper application fields under the low energy mode. This research selects the off-line maintenance system by using one chip design, and proposes the direction of contents for enhancing the effectiveness of the system. And we expect that this memory tags will be valuable for disaster scenes as well as battle fields.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.3A
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• pp.360-367
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• 2006

In this paper, we designed a digital codec of an RFID tag for EPC global generation 2 class 1. There are a large number of studies on RRD standard and anti-collision algorithm but few studies on the design of digital parts of the RFID tag itself. For this reason, we studied and designed the digital codec hardware for EPC global generation 2 class 1 tag. The purpose of this paper is not to improve former studies but to present the hardware architecture, an estimation of hardware size and power consumption of digital part of the RFID tag. Results are synthesized using Synopsys with a 0.35um standard cell library. The hardware size is estimated to be 111640 equivalent inverters and dynamic power is estimated to be 10.4uW. It can be improved through full-custom design, but we designed using a standard cell library because it is faster and more efficient in the verification and the estimation of the design.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.3
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• pp.580-585
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• 2009

Real Time Locating Systems (RTLS) are used to track and identify the location of objects in real time using simple, inexpensive tags attached to or embedded in objects and readers that receive the wireless signals from these tags to determine their locations. A tag is powered an internal source such as a battery. The blink frequency of a tag affects the energy efficiency and the locating accuracy of RTLS. The mobility of a tag also affects the locating accuracy. In this paper, we introduce a RTLS tag design which improves the locating accuracy and the power efficiency. We propose an adaptive transmission-rate control algorithm using a motion sensor. By analyzing the signal pattern of the motion sensor, we can build a model to estimate the speed of the motion. Using this model, our algorithm can achieve better locating accuracy and lower power consumption than those of the conventional method. In our experiments, the number of transmission reduced as 40%, keeping similar locating accuracy.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.11
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• pp.56-62
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• 2008

Modern microprocessors must deliver high application performance, while the design process should not subordinate power. In terms of performance and power tradeoff, the instructions window is particularly important. This is because a large instruction window leads to achieve high performance. However, naive scaling conventional instruction window can severely affect the complexity and power consumption. This paper explores an architecture level approach to reduce power dissipation. We propose a low power issue logic with an efficient tag translation. The direct lookup table (DTL) issue logic eliminates the associative wake-up of conventional instruction window. The tag translation scheme deals with data dependencies and resource conflicts by using bit-vector based structure. Experimental results show that, for SPEC2000 benchmarks, the proposed design reduces power consumption by 24.45% on average over conventional approach.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.16 no.6
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• pp.25-35
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• 2006

Radio Frequency identification (RFID) will become an important technology in remotely object identification systems. However, the use of RFID tags may create new threats to the sniな and Privacy of individuals holding RFID tags. These threats bring several problems which are information leakage of a tag, location trace of individuals and impersonation of a tag. Low-cost RFID systems have much restrictions such as the limited computing power, passive power mechanism and low storage space. Therefore, the cost of tag's computation should be considered as an important factor in low-cost RFID systems. We propose an authentication protocol, OHLCAP which requires only one one-way hash function operation and hence is very efficient. Furthermore, our protocol is suitable to distribution database environment. Hence our scheme can be applied to ubiquitous computing environment.