• Title/Summary/Keyword: low output

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A Study on Radar Waveform - Polyphase Sequence (레이더 파형 연구 - 다위상 시퀀스)

  • Yang, Jin-Mo;Kim, Whan-Woo
    • Journal of the Korea Institute of Military Science and Technology
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    • v.13 no.4
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    • pp.673-682
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    • 2010
  • This paper describes and analyzes a various generation methods of the mutually orthogonal polyphase sequences with low cross-correlation peak sidelobe and low autocorrelation peak sidelobe levels. The mutual orthogonality is the key requirement of multi-static or MIMO(Multi-Input Multi-Output) radar systems which provides the good target detection and tracking performance. The polyphase sequences, which are generated by SA(Simulated Annealing) and GA(Genetic Algorithm), have been analyzed with ACF(Autocorrelation Function) PSL(Peak Sidelobe Level) and CCF(Crosscorrelation Function) level at the matched filter output. Also, the ambiguity function has been introduced and simulated for comparing Doppler properties of each sequence. We have suggested the phase selection rule for applying multi-static or MIMO systems.

Comparison of Different Deep Learning Optimizers for Modeling Photovoltaic Power

  • Poudel, Prasis;Bae, Sang Hyun;Jang, Bongseog
    • Journal of Integrative Natural Science
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    • v.11 no.4
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    • pp.204-208
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    • 2018
  • Comparison of different optimizer performance in photovoltaic power modeling using artificial neural deep learning techniques is described in this paper. Six different deep learning optimizers are tested for Long-Short-Term Memory networks in this study. The optimizers are namely Adam, Stochastic Gradient Descent, Root Mean Square Propagation, Adaptive Gradient, and some variants such as Adamax and Nadam. For comparing the optimization techniques, high and low fluctuated photovoltaic power output are examined and the power output is real data obtained from the site at Mokpo university. Using Python Keras version, we have developed the prediction program for the performance evaluation of the optimizations. The prediction error results of each optimizer in both high and low power cases shows that the Adam has better performance compared to the other optimizers.

The Low Voltage and High Current DC-DC Converter Using Synchronous Rectifier (동기정류기를 이용한 저전압/대전류용 DC-DC 컨버터)

  • Hwang S.M.
    • Proceedings of the KIPE Conference
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    • 2003.07a
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    • pp.85-88
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    • 2003
  • In this Paper, we report the experimental results of the Forward-flyback U-U converter with current doubler and synchronous rectifier. The experimental converter, that has a output voltage 3.3V, output current 20A, maximum power of 66W, switching frequency of 290kHz and input voltage range of 36-75V, has been successfully implemented. As a result, in the entire voltage range the measured full load efficiency was above 85$\%$, and the output voltage was regulated at 3.3V within $\pm3{\%}$ tolerance.

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Analysis of Input-Output Characteristics for Single-Phase Diode Rectifier (다이오드 정류회로의 입.출력 특성해석)

  • 한창영
    • Proceedings of the KIPE Conference
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    • 2000.07a
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    • pp.299-304
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    • 2000
  • In this paper we investigate accurately the input-output characteristic of single-phase diode rectifier. The diode rectifier has some advantages of simplicity cost and high-efficiency. But it has some defects which THD of input current low PF and voltage drop of output side. In order to compensate it we analyzed using the parameter variation and introduced capacitor insertion method for reducing the distortion and increasing the PF.

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An accelerometer aided mixing algorithm for strapdown attitude(roll, pitch) reference system (스트랩다운 비행자세(롤, 피치)측정장치의 가속도계 보조 혼합알고리즘)

  • 유재종;이장규
    • 제어로봇시스템학회:학술대회논문집
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    • 1989.10a
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    • pp.54-58
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    • 1989
  • The purpose of this paper is to develop a more accurate attitude algorithm with low grade gyro output. The proposed algorithm estimates attitudes by combining accelerometer and gyro output. For performance improvement of the algorithm, a method of velocity compensation is proposed for a better attitude estimation which is calculated from the accelerometer output. Velocity compensation is done by using Kalman Filter to estimate another velocity component.

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Controller Design of the Series Resonant Converter for Reducing Output Voltage Ripple (출력 전압 맥동감소를 위한 직렬공진형 변환기의 제어기 설계)

  • 김만고;한재원;윤명중
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.37 no.6
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    • pp.376-382
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    • 1988
  • A small-signal low-frequency disturbance of the input line affects the regulated-output voltage of the series resonant converter. To mitigate the detrimental effect, the output feedback PI-controller is employed. Small-signal linear models are represented to characterize the closed loop series resonant converter system. Design equations for the PI-controller which satisfy stability and percent ripple conditions are derived from the closed-loop linear model. Experimental results are presented which show excellent correlation with theory.

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A study on output feedback control (출력궤환제어에 대한 연구)

  • 심영철
    • 전기의세계
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    • v.30 no.2
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    • pp.86-96
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    • 1981
  • The problem of incomplet state feedback began to appear late in60's and early in 70's. This was motivated by inability to measure all the states of the system in practice. This survey paper traces the early developments in the subject through to the most recent achievement of gain-determining, pole-assignment, stabilization, and low sensitivity system design with output feedback.

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A Single-Phase Embedded Z-Source DC-AC Inverter by Asymmetric Voltage Control (비대칭 전압 제어를 이용한 단상 임베디드 Z-소스 DC-AC 인버터)

  • Oh, Seung-Yeol;Kim, Se-Jin;Jung, Young-Gook;Lim, Young-Cheol
    • The Transactions of the Korean Institute of Power Electronics
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    • v.17 no.4
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    • pp.306-314
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    • 2012
  • In case of the conventional DC-AC inverter using two DC-DC converters with unipolar output capacitor voltages, for generating the AC output voltage, the output capacitor voltages of its each DC-DC converter must be higher than the DC input voltage. To solve this problem, this paper proposes a single-phase DC-AC inverter using two embedded Z-source converters with bipolar output capacitor voltages. The proposed inverter is composed of two embedded Z-source converters with common DC source and output AC load. The AC output voltage is obtained by the difference of the output capacitor voltages of each converter. Though the output capacitor voltage of converter is relatively low compared to the conventional method, it can be obtained the same AC output voltage. Moreover, by controlling asymmetrically the output capacitor voltage, the AC output voltage of the proposed system is higher than the DC input voltage. To verify the validity of the proposed system, a DSP(TMS320F28335) based single-phase embedded Z-source DC-AC inverter was made and the PSIM simulation was performed under the condition of the DC source 38V. As controlled symmetrically and asymmetrically the output capacitor voltages of each converter, the proposed inverter could produce the AC output voltage with sinusoidal waveform. Particularly, in case of asymmetric control, a higher AC output voltage was obtained. Finally, the efficiency of the proposed system was measured as 95% and 97% respectively in case of symmetric and asymmetric control.

A Temperature- and Supply-Insensitive 1Gb/s CMOS Open-Drain Output Driver for High-Bandwidth DRAMs (High-Bandwidth DRAM용 온도 및 전원 전압에 둔감한 1Gb/s CMOS Open-Drain 출력 구동 회로)

  • Kim, Young-Hee;Sohn, Young-Soo;Park, Hong-Jung;Wee, Jae-Kyung;Choi, Jin-Hyeok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.8
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    • pp.54-61
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    • 2001
  • A fully on-chip open-drain CMOS output driver was designed for high bandwidth DRAMs, such that its output voltage swing was insensitive to the variations of temperature and supply voltage. An auto refresh signal was used to update the contents of the current control register, which determined the transistors to be turned-on among the six binary-weighted transistors of an output driver. Because the auto refresh signal is available in DRAM chips, the output driver of this work does not require any external signals to update the current control register. During the time interval while the update is in progress, a negative feedback loop is formed to maintain the low level output voltage ($V_OL$) to be equal to the reference voltage ($V_{OL.ref}$) which is generated by a low-voltage bandgap reference circuit. Test results showed the successful operation at the data rate up to 1Gb/s. The worst-case variations of $V_{OL.ref}$ and $V_OL$ of the proposed output driver were measured to be 2.5% and 7.5% respectively within a temperature range of $20^{\circ}C$ to $90^{\circ}C$ and a supply voltage range of 2.25V to 2.75V, while the worst-case variation of $V_OL$ of the conventional output driver was measured to be 24% at the same temperature and supply voltage ranges.

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A Multi-Stage CMOS Charge Pump for Low-Voltage Memories

  • Kim, Young-Hee;Lim, Gyu-Ho;Yoo, Sung-Han;Park, Mu-Hun;Ko, Bong-Jin;Cho, Seong-Ik;Min, Kyeong-Sik;Ahn, Jin-Hong;Chung, Jin-Yong
    • Proceedings of the IEEK Conference
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    • 2002.07a
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    • pp.369-372
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    • 2002
  • To remedy both the degradation and saturation of the output voltages in the modified Dickson pump, a new multistage charge pump circuit is presented in this paper. Here using PMOS charge-transfer switches instead of NMOS ones eliminates the necessity of diode-configured output stage in the modified-Dickson pump, achieving the improved voltage pumping gain and its output voltages proportional to the stage numbers. Measurement indicates that VOUT/3VDD of this new pump circuit with two stages reaches to a value as high as 0.94V even with low VDD=1.0 V, strongly addressing that this scheme is very favorable at low-voltage memory applications.

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