• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.3A
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• pp.254-259
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• 2010

In this paper, we propose a low-complexity carrier frequency offset (CFO) estimation algorithm for OFDM based wireless LAN, IEEE 802.11a. The complexity of the arctangent operation to calculate the argument of auto-correlation for CFO estimation is reduced by a novel range pointer method. The proposed algorithm estimates fine CFO value first and then based on the fine CFO value, simple criteria is used for the boundary decision of integer CFO estimation. The simulation results show that the performance of the proposed algorithm is slightly better than the conventional method while the computational complexity is reduced by 50%. Furthermore, the proposed method can be easily implemented for the low complex next generation MIMO-OFDM based WLAN systems.

• Journal of Sensor Science and Technology
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• v.26 no.5
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• pp.331-337
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• 2017

A readout circuit for a tactile sensor pad based on force sensing resistors was proposed, which was composed of an analog signal conditioning circuit and a digital circuit with a microcontroller. The conventional signal conditioning circuit has a dc offset voltage in the output signal, which results from the reference voltage applied to the FSR devices. The offset voltage reduces the dynamic range of the circuit and makes it difficult to operate the circuit under a low voltage power supply. In the proposed signal conditioning circuit, the dc offset voltage was removed completely. The microcontroller with A/D converter and D/A converter was used to enlarge the measurement range of pressure. For this, the microcontroller adjusts the FSR reference voltage according to the resistance magnitude of FSR under pressure. The operation of the proposed readout circuit which was connected to a tactile sensor pad with $5{\times}10$ FSR array was verified experimentally. The experimental results show the proposed readout circuit has the wider measurement range of pressure than the conventional circuit. The proposed circuit is suitable for low voltage and low power applications.

• Journal of information and communication convergence engineering
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• v.16 no.3
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• pp.197-202
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• 2018

This paper reveals the impact of the insertion of electromagnetic band gap (EBG) structures on the performance of circularly polarized (CP) patch-slot antenna with offset slot. Several optimizations are necessary to precise physical parameters in the aim to fix the resonance frequency at 3.2 GHz. The proposed antenna possesses lightweight, simplicity, low cost, and circular polarization ensured by two feeding sources to permit right-hand and left-hand circular polarization process (RHCP and LHCP). The measured results compared with simulation results of the proposed circularly polarized EBG antenna with offset slot show good band operations with –10 dB impedance bandwidths of 9.1% and 36.2% centered at 3.2 GHz, which cover weather radar, surface ship radar, and some communications satellites bands. Our investigation will confirm the simulation and experimental results of the EBG antenna involving new EBG structures.

• IEIE Transactions on Smart Processing and Computing
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• v.4 no.3
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• pp.158-162
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• 2015

A low phase noise CMOS voltage controlled oscillator(VCO) for multi-band/multi-standard RF Transceivers is presented. For both wide tunability and low phase noise characteristics, Hybrid inductor which uses both bondwire inductor and planar spiral inductor in the same area, is proposed. This approach reduces inductance variation and presents high quality factor without custom-designed single-turn inductor occupying large area, which improves phase noise and tuning range characteristics without additional area loss. An LC VCO is designed in a 0.13um CMOS technology to demonstrate the hybrid inductor concept. The measured phase noise is -121dBc/Hz at 400KHz offset and -142dBc/Hz at 3MHz offset from a 900MHz carrier frequency after divider. The tuning range of about 28%(3.15 to 4.18GHz) is measured. The VCO consumes 7.5mA from 1.3V supply and meets the requirements for GSM/EDGE and WCDMA standard.

• JSTS:Journal of Semiconductor Technology and Science
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• v.7 no.2
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• pp.67-75
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• 2007

To improve low sense margin at low voltage, we propose a negatively driven sensing (NDS) scheme and to solve the problem of WL-to-BL short leakage fail, a variable bitline reference scheme with free-level precharged bitline (FLPB) scheme is adopted. The influence of the threshold voltage offset of NMOS and PMOS transistors in a latch type sense amplifier is very important factor these days. From evaluating the sense amplifier offset voltage distribution of NMOS and PMOS, it is well known that PMOS has larger distribution in threshold voltage variation than that of NMOS. The negatively-driven sensing (NDS) scheme enhances the NMOS amplifying ability. The offset voltage distribution is overcome by NMOS activation with NDS scheme first and PMOS activation followed by time delay. The sense amplifier takes a negative voltage during the sensing and amplifying period. The negative voltage of NDS scheme is about -0.3V to -0.6V. The performance of the NDS scheme for DRAM at the gigabit level has been verified through its realization on 1-Gb DDR2 DRAM chip.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.38A no.2
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• pp.209-216
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• 2013

In this paper, we design and analyze digital retrodirective array antenna (RDA) system in 60GHz wireless communication for low power consumption and high quality. Digital RDA can automatically make beam toward source without information about the direction of incoming signal, this system is able to do low power communication thanks to increased signal to interference noise ratio (SINR) because making the beam toward source can reduce interference signals. The frequency offset seriously arises when millimetric wave band like 60GHz is used to communicate for high-speed transmission. The proposed system is robustly designed to frequency offset through designing digital phase lock loop in order to solve the problem of frequency offset. In this paper, we analyze the performance of the proposed system according to the number of array antenna and frequency offset. striking space.

• Journal of Electrical Engineering and Technology
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• v.7 no.4
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• pp.626-635
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• 2012

Most of single frequency GPS receivers utilize low-quality crystal oscillators. If a lowquality crystal oscillator is utilized as the time reference of a GPS receiver, the receiver's clock bias grows very fast due to its inherent low precision and poor stability. To prevent the clock bias becoming too large, large clock jumps are intentionally injected to the clock bias and the time offset for clock steering purpose. The abrupt changes in the clock bias and the time offset, if not properly considered, induce serious accuracy degradation in relative differential positioning. To prevent the accuracy degradation, this paper proposes an efficient and systematic method to eliminate the undesirable clock jump effects. Experiment results based on real measurements verify the effectiveness of the propose method.

• Transactions of the Korean Society of Automotive Engineers
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• v.15 no.2
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• pp.135-142
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• 2007

MADYMO human model with the detail neck was used to investigate the reaction force of neck and neck injury from rear impact directions. In the validation simulation, head acceleration, thorax acceleration and the global kinematics of the head and neck were correlated well with experimental data. Acceleration data from three 15 km/h low speed car rear impact pendulum tests(rear-end, offset, oblique) were used to simulate the model. In the simulation results, the reaction force on the facet joint and discs in the oblique rear impact were higher than rear-end, offset rear impacts. Further research is still needed in order to neck injury analysis about different crash parameters.

• Journal of Electrical Engineering and Technology
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• v.12 no.4
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• pp.1471-1483
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• 2017

The low-frequency characteristics of four-switch three-phase (FSTP) inverter are investigated in this paper. Firstly, a general space vector pulse width modulation (SVPWM) directly involved the neutral point voltage of DC-link is proposed, where no sector identifications and trigonometric function calculations are needed. Subsequently, to suppress the DC offset in the neutral point voltage, the relationship between the neutral point voltage and the ${\beta}-axis$ component of the load current is derived, and then a new neutral point voltage control scheme is proposed where no low pass filter is adopted. Finally, the relationship between the load power factor and the maximum linear modulation index of the FSTP inverter is revealed. Since the operational region for the FSTP inverter in low frequency is reduced by the enlarged amplitude of the neutral point voltage, a linear modulation range enlargement scheme is proposed. A permanent magnet synchronous motor with preset rotary speed serves as the low-frequency load of the FSTP inverter. Experimental results verify that the new neutral point voltage control scheme is effective in the deviation suppression of the neutral point voltage, and the proposed scheme is able to provide a larger linear operational region in low frequency.

• Journal of Power Electronics
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• v.6 no.3
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• pp.235-244
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• 2006

Recently, speed sensorless vector control for synchronous reluctance motors (SYRMs) has deserved attention because of its advantages. Although rotor angle calculation using flux estimation is a straightforward approach, the DC offset can cause an increasing pure integrator error in this estimator. In addition, this method is affected by parameter fluctuation. In this paper, to control the motor at the low speed region, a modified programmable cascaded low pass filter (MPCPLF) with sensorless online parameter identification based on a block pulse function is proposed. The use of the MPCLPF is suggested because in programmable, cascade low pass filters (PCLPF), which previously have been applied to induction motors, the drift increases vastly wl)en motor speed decreases. Parameter identification is also used because it does not depend on estimation accuracy and can solve parameter fluctuation effects. Thus, sensorless speed control in the low speed region is possible. The experimental system includes a PC-based control with real time Linux and an ALTERA Complex Programmable Logic Device (CPLD), to acquire data from sensors and to send commands to the system. The experimental results show the proposed method performs well, speed and angle estimation are correct. Also, parameter identification and sensorless vector control are achieved at low speed, as well as, as at high speed.