• Title/Summary/Keyword: low communication load

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Effect of Load Modeling on Low Frequency Current Ripple in Fuel Cell Generation Systems

  • Kim, Jong-Soo;Choe, Gyu-Yeong;Kang, Hyun-Soo;Lee, Byoung-Kuk
    • Journal of Electrical Engineering and Technology
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    • v.5 no.2
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    • pp.307-318
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    • 2010
  • In this work, an accurate analysis of low frequency current ripple in residential fuel cell power generation systems is performed based on the proposed residential load model and its unique operation algorithm. Rather than using a constant dc voltage source, a proton exchange membrane fuel cell (PEMFC) model is implemented in this research so that a system-level analysis considering the fuel cell stack, power conditioning system (PCS), and the actual load is possible. Using the attained results, a comparative study regarding the discrepancies of low frequency current ripple between a simple resistor load and a realistic residential load is performed. The data indicate that the low frequency current ripple of the proposed residential load model is increased by more than a factor of two when compared to the low frequency current ripple of a simple resistor load under identical conditions. Theoretical analysis, simulation data, and experimental results are provided, along with a model of the load usage pattern of low frequency current ripples.

A High Current Efficiency CMOS LDO Regulator with Low Power Consumption and Small Output Voltage Variation

  • Rikan, Behnam Samadpoor;Abbasizadeh, Hamed;Kang, Ji-Hun;Lee, Kang-Yoon
    • Journal of IKEEE
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    • v.18 no.1
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    • pp.37-44
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    • 2014
  • In this paper we present an LDO based on an error amplifier. The designed error amplifier has a gain of 89.93dB at low frequencies. This amplifier's Bandwidth is 50.8MHz and its phase margin is $59.2^{\circ}C$. Also we proposed a BGR. This BGR has a low output variation with temperature and its PSRR at 1 KHz is -71.5dB. For a temperature variation from $-40^{\circ}C$ to $125^{\circ}C$ we have just 9.4mV variation in 3.3V LDO output. Also it is stable for a wide range of output load currents [0-200mA] and a $1{\mu}F$ output capacitor and its line regulation and especially load regulation is very small comparing other papers. The PSRR of proposed LDO is -61.16dB at 1 KHz. Also we designed it for several output voltages by using a ladder of resistors, transmission gates and a decoder. Low power consumption is the other superiority of this LDO which is just 1.55mW in full load. The circuit was designed in $0.35{\mu}m$ CMOS process.

LSTM Model-based Prediction of the Variations in Load Power Data from Industrial Manufacturing Machines

  • Rita, Rijayanti;Kyohong, Jin;Mintae, Hwang
    • Journal of information and communication convergence engineering
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    • v.20 no.4
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    • pp.295-302
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    • 2022
  • This paper contains the development of a smart power device designed to collect load power data from industrial manufacturing machines, predict future variations in load power data, and detect abnormal data in advance by applying a machine learning-based prediction algorithm. The proposed load power data prediction model is implemented using a Long Short-Term Memory (LSTM) algorithm with high accuracy and relatively low complexity. The Flask and REST API are used to provide prediction results to users in a graphical interface. In addition, we present the results of experiments conducted to evaluate the performance of the proposed approach, which show that our model exhibited the highest accuracy compared with Multilayer Perceptron (MLP), Random Forest (RF), and Support Vector Machine (SVM) models. Moreover, we expect our method's accuracy could be improved by further optimizing the hyperparameter values and training the model for a longer period of time using a larger amount of data.

Modeling of Load Element for a Low Voltage DC Distribution System (저전압 DC 배전시스템 구성요소의 부하 모델링)

  • Gwon, Gi-Hyeon;Han, Joon;Oh, Yun-Sik;Kim, Eung-Sang;Kim, Chul-Hwan
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.28 no.6
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    • pp.113-121
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    • 2014
  • At the end of the 19th century, a battle known as the War of the Currents was fought over how electricity would be generated, delivered, and utilized. In this day and age, there has been a growing interest in Green Growth policies as countermeasures against global warming. As a result of these policies, the use of new and renewable energy needed a power converter to replace fossil fuels has expanded. To reduce power consumption through high efficiency of conversion, Low Voltage DC (LVDC) distribution systems are suggested as an alternative. In a DC distribution system, DC loads are very efficient due to decrease the stages of power conversion. If the LVDC distribution system is adopted, not only DC load but also existing AC loads should be connected with LVDC system. Thus, the modeling of two loads is needed to analyze the DC distribution system. This paper, especially, is focused on the modeling of resistive load and electronic load including power electronic converters using ElectroMagnetic Transient Program (EMTP) software.

Single-Switch ZVZCS Quasi-Resonant CLL Isolated DC-DC Converter for 32'' LCD TV

  • Ryu, Seung-Hee;Ahn, Jung-Hoon;Cho, Kwang-Seung;Lee, Byoung-Kuk
    • Journal of Electrical Engineering and Technology
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    • v.10 no.4
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    • pp.1646-1654
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    • 2015
  • In this paper, a single-switch ZVZCS quasi-resonant CLL isolated DC-DC converter for driving a low-power (less than 100 W) 32'' LED backlighting liquid crystal display television (LCD TV) is proposed. The proposed converter exhibits both forward and flyback operational characteristics. All semiconductors are activated and deactivated under the soft switching conditions during the switching transition without additional active devices. The switching frequency varies less than about 10 kHz for load variations, leading to minimizing the efficiency reduction under light load. Furthermore, the low di/dt and dv/dt by soft switching enhance the electromagnetic interference (EMI) performance above 1 MHz. A theoretical analysis is described in detail, and a 72-W prototype converter verifies the validity of the analysis.

A Study on the Signal Anti-reduction Equipment in Power Line Communication (전력선 통신 시스템을 위한 신호 감쇠 저하 장치 연구)

  • 김주환
    • Proceedings of the KIPE Conference
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    • 2000.07a
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    • pp.103-106
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    • 2000
  • In this paper a communication system that is not using the communication line but power line is presented. It will be very useful for an information-oriented society with tele-metering and home automation. Conventional system has a difficulty in transmitting information due to decreasing communication voltage and increasing carrier, current. Proposed idea is a special type switching amplifier system which has a low inner resistance. It can provide reactive power and dose not have low impedance between the transceivers. This new system is proposed to overcome the loss of conductor load in a PLC system.

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Low-Complexity Maximum-Likelihood Decoder for VBLAST-STBC Scheme Using Non-square OSTBC Code Rate 3/4

  • Pham Van-Su;Le Minh-Tuan;Mai Linh;Yoon Gi-Wan
    • Journal of information and communication convergence engineering
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    • v.4 no.2
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    • pp.75-78
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    • 2006
  • This work presents a low complexity maximum-likelihood decoder for signal detection in VBLAST-STBC system, which employs non-square O-STBC code rate 3/4. Stacking received symbols from different symbol duration and applying QR decomposition result in the special format of upper triangular matrix R so that the proposed decoder is able to provide not only ML-like BER performance but also very low computational load. The low computational load and ML-like BER performance properties of the proposed decoder are verified by computer simulations.

Study on Load Redistribution Mechanism in Grid System (그리드시스템을 위한 부하재분배 메커니즘에 관한 연구)

  • Lee, Seong-Hoon
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.10 no.9
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    • pp.2350-2353
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    • 2009
  • For applications that are grid enabled, the grid can offer a resource balancing effect by scheduling grid jobs on machines with low utilization. When jobs communicate with each other, the internet, with storage resources, an advanced scheduler could schedule them to minimize communications traffic or minimize the distance of the communications. We propose an load redistribution algorithm to minimize communication traffic and distance of the communication using genetic algorithm. The experiments show the proposed load redistribution algorithm performs efficiently in the variance of load in grid environments.

A Wide Input Range, 95.4% Power Efficiency DC-DC Buck Converter with a Phase-Locked Loop in 0.18 ㎛ BCD

  • Kim, Hongjin;Park, Young-Jun;Park, Ju-Hyun;Ryu, Ho-Cheol;Pu, Young-Gun;Lee, Minjae;Hwang, Keumcheol;Yang, Younggoo;Lee, Kang-Yoon
    • Journal of Power Electronics
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    • v.16 no.6
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    • pp.2024-2034
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    • 2016
  • This paper presents a DC-DC buck converter with a Phase-Locked Loop (PLL) that can compensates for power efficiency degradation over a wide input range. Its switching frequency is kept at 2 MHz and the delay difference between the High side driver and the Low side driver can be minimized with respect to Process, Voltage and Temperature (PVT) variations by adopting the PLL. The operation mode of the proposed DC-DC buck converter is automatically changed to Pulse Width Modulation (PWM) or PWM frequency modes according to the load condition (heavy load or light load) while supporting a maximum load current of up to 1.2 A. The PWM frequency mode is used to extend the CCM region under the light load condition for the PWM operation. As a result, high efficiency can be achieved under the light load condition by the PWM frequency mode and the delay compensation with the PLL. The proposed DC-DC buck converter is fabricated with a $0.18{\mu}m$ BCD process, and the die area is $3.96mm^2$. It is implemented to have over a 90 % efficiency at an output voltage of 5 V when the input range is between 8 V and 20 V. As a result, the variation in the power efficiency is less than 1 % and the maximum efficiency of the proposed DC-DC buck converter with the PLL is 95.4 %.

Design of LLC Resonant Converter having Enhanced Load Range for Communication Power (넓은 부하 범위를 갖는 통신 전원용 LLC 공진 컨버터의 설계)

  • So, Byong-Chul;Seo, Ki-Bong;Lee, Dong-Hoo;Jung, Ho-Chul;Hwang, Soon-Sang;Kim, Hag-Wone;Cho, Kwan-Yuhl;Lim, Byung-Kuk
    • The Transactions of the Korean Institute of Power Electronics
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    • v.17 no.5
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    • pp.461-469
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    • 2012
  • This paper deals with LLC resonant converter for communication power supply. Generally, the load range of communication power is very wide. However, voltage conversion ratio of LLC converter is highly dependent of load condition. So, it is not easy to design of robust power supply along with the wide load condition. Especially, it is not possible to meet the required low voltage conversion ratio for low output voltage with high input voltage under the light load condition. To solve this problem, in this paper, a new duty control interlinked with operational frequency has been proposed. To prove the usefulness of the proposed control method, the simulation and experiments were carried out. The simulation and experimental results show the usefulness of the proposed control method.