• Proceedings of the KIEE Conference
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• 2004.11c
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• pp.190-192
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• 2004

In this paper, we propose a low bit-rate embedded video compression scheme with 3-D block partition coding in the wavelet domain. The proposed video compression scheme includes multi-level 3-dimensional dyadic wavelet decomposition, raster scanning within each subband, formation of block, 3-D partitioning of block, and adaptive arithmetic entropy coding. Although the proposed video compression scheme is quit simple, it produces bit-stream with good features, including SNR scalability from the embedded nature. Experimental results demonstrate that the proposed video compression scheme is quit competitive to other good wavelet-based video coders in the literature.

• Proceedings of the Acoustical Society of Korea Conference
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• autumn
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• pp.173-176
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• 1999

In this work, a A/D converter is implemented to obtain 8bit resolution at a conversion rate of 10Msample/s for video applications. Proposed architecture is designed low power A/D converter that pipelined architecture consists of flash A/D converter. This architecture consists of two identical stages that consist of sample/hold circuit, low power comparator, voltage reference circuit and MDAC of binary weighted capacitor array. Proposed A/D converter is designed using $0.25{\mu}m$ CMOS technology The SNR is 76.3dB at a sampling rate of 10MHz with 3.9MHz sine input signal. When an 8bit 10Msample/s A/D converter is simulated, the Differential Nonlinearity / Integral Nonlinearity (DNL/ INL) error are ${\pm}0.5/{\pm}2$ LSB, respectively. The power consumption is 13mW at 10Msample/s.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.601-604
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• 1999

We propose a new hierarchical motion estimator architecture that supports the advanced prediction mode of recent low bit-rate video coders such as H.263 and MPEG-4. In the proposed VLSI architecture, a basic searching unit (BSU) is commonly utilized for all hierarchical levels to make a systematic and small sized motion estimator. Since the memory bank of the proposed architecture provides scheduled data flow for calculating 8$\times$8 block-based sum of absolute difference (SAD), both a macroblock-based motion vector (MV) and four block-based MVs are simultaneously obtained for each macroblock in the advanced prediction mode. The proposed motion estimator gives similar coding performance compared with full search block matching algorithm (FSBMA) while achieving small size and satisfying the advanced prediction mode.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.4
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• pp.771-781
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• 1997

In order to solve the problem of uncovered background region due to the region-due to the region-based motion estimation, this paper presents a new method which generates the uncovered region memory using motion estimation and shows the application of the algorithm for very low bit rate video coding. The proposed algorithm can be briefly described as follows it detects the changed region by using the information of FD(frame difference) and segmentation, and then as for only that region the backward motion estimation without transmission of shape information is done. Therefore, from only motion information the uncovered background region memory is generated and updated. The contents stored in the uncovered background region memory are referred whenever the uncovered region comes into existence. The regions with large prediction error are transformed and coded by using DCT. As results of simulation, the proposed algorithm shows the superior improvement in the subjective and objective image quality due to the remarkable reduction of transmission bits for prediction error.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.41 no.1
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• pp.47-56
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• 2004

This paper describes a new bit allocation algorithm that can achieve a constant bit rate when coding multiple video objects, while improving rate-distortion (R-D) performance over the VM5 method for MPEG-4 object-based video coding. In particular, we propose two models to estimate the rate-distortion characteristics of coded objects as well as skipped objects. Based on the proposed models, we present several R-D coding modes with spatio-temporal trade-offs to improve coding efficiency. The proposed algorithm is performed at the object level for object-based video coding. Simulation results demonstrate moderate improvement at low as well as high bit rates. The proposed algorithm can produce the actual coded bits very close to the target bits over a wide range of bit rates. Consequently, the proposed algerian has not experienced any buffer overflow or underflow over the bit rates between 32 kbps and 256 kbps.

• The Journal of the Korea institute of electronic communication sciences
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• v.10 no.12
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• pp.1329-1336
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• 2015

Due to the advances in hardware technologies for low-power CMOS cameras, there have been various researches on wireless video sensor network(WVSN) applications including agricultural monitoring and environmental tracking. In such a system, its core technologies include video compression and wireless transmission. Since data of video sensors are bigger than those of other sensors, it is particularly necessary to estimate precisely the traffic after video encoding. In this paper, we present an estimation method for the encoded video traffic in WVSN networks. To estimate traffic characteristics accurately, the proposed method first measures complexities of frames and then applies them to the bit rate estimation adaptively. It is shown by experimental results that the proposed method improves the estimation of bit rate characteristics by more than 12% as compared to the existing method.

• ETRI Journal
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• v.27 no.1
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• pp.53-63
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• 2005

A compressed video bitstream is sensitive to errors that may severely degrade the reconstructed images even when the bit error rate is small. One approach to combat the impact of such errors is the use of error concealment at the decoder without increasing the bit rate or changing the encoder. For spatial-error concealment, we propose a method featuring edge continuity and texture preservation as well as low computation to reconstruct more visually acceptable images. Aiming at temporal error concealment, we propose a two-step algorithm based on block matching principles in which the assumption of smooth and uniform motion for some adjacent blocks is adopted. As simulation results show, the proposed spatial and temporal methods provide better reconstruction quality for damaged images than other methods.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.10a
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• pp.1024-1026
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• 2013

DVC (Distributed Video Coding) techniques provides a basic theory for the implementation of low-power video encoder. Conventional methods decide the parity bit request at decoder side. These are effective in controlling the bit-rate, but, are not able to control the visual quality. Thus, this paper presents an effective method of estimating visual quality improved by correcting the virtual channel noise for the reconstructed frame. Through several experiments, it is shown that the proposed method are able to estimate effectively the decoded visual quality.

• Journal of Korea Multimedia Society
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• v.8 no.9
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• pp.1216-1226
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• 2005

In this paper, a preventive transmission rate decision algorithm, called PTRD, is proposed for the transmission of live video over networks with dynamic bandwidth allocation capability. Frame analyzer predicts the bit-rates of future frames before encoding by analyzing the source information such as spatial variances and the degree of scene changes. By using the predicted bit-rates, transmission rate bounds are derived from the constraints of encoder and decoder buffers. To resolve the problem of renegotiation cost increment due to frequent renegotiations, the PTRD algorithm is presented to decide transmission rates considering the elapsed time after the recent renegotiation and the perceived video quality. From the simulation results, compared to the normalized LMS based method, PTRD is shown to achieve high channel utilization with low renegotiation cost and no delay violation.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.47 no.1
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• pp.128-138
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• 2010

In this paper, we propose a new bit assignment scheme for Wyner-Ziv video coding. Distributed video coding (DVC) is a new video coding paradigm which enables greatly low complexity encoding because it does not have any motion prediction module at encoder. Therefore, it is very well suited for many applications such as video communication, video surveillance, extremely low power consumption video coding, and other portable applications. Theoretically, the Wyner-Ziv video coding is proved to achieve the same rate-distortion (RD) performance comparable to that of the joint video coding. However, its RD performance has much gap compared to MC-DCT-based video coding such as H.264/AVC. Moreover, Transform Domain Wyner-Ziv (TDWZ) video coding which is a kind of DVC with transform module has difficulty of exact bit assignment because the entire image is treated as a same message. In this paper, we propose a feasible bit assignment algorithm using adaptive quantization matrix selection for the TDWZ video coding. The proposed method can calculate suitable bit amount for each region using the local characteristics of image. Simulation results show that the proposed method can enhance coding performance.