• 한국구조물진단유지관리공학회 논문집
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• 제12권5호
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• pp.65-73
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• 2008

본 연구는 칼만(Kalman) 필터 적용에 따른 LQG 제어기의 안정도 여유 상실을 극복하기위해 적용한 LTR 제어 시스템의 성능을 시간영역과 주파수영역에서 분석해 보고, 설계에 중요한 요소인 안정도 여유의 회복이 DUOX 구조물에 대해서도 실현되는지 여부를 확인해 보고자 함에 그 목적이 있다. 제어 대상의 구조물은 4층 골조로서 상부에 TMD와 AMD로 구성된 DUOX 시스템이 설치된 하이브리드 시스템이다. LTR/DUOX 제어기법으로 제어한 결과, 주파수응답의 Bode 선도를 통해 구한 게인 여유가 약 30dB로써 LQG/DUOX 제어기의 유실된 게인 여유를 20배 이상 회복시켜 보다 안정도 강인성이 우수한 제어기 설계가 구현되었다.

• 한국시스템다이내믹스연구
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• 제14권3호
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• pp.51-74
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• 2013

Recently, Community Rebuilding Projects (hereinafter CRPs) in Korea have been driven and motivated by community inhabitants by themselves, and highlighted as an alternative approach to overcome the limitation revealed normally in top-down projects of community vitalization by the Government. The CRPs encourage community-lead development because it happens to integrate multiple stakeholders and to help inhabitants to participate in the process of the CRPs by accumulating and enlarging social capital and network among inhabitants, and the social gain consequently raises the efficiency of public investment in revitalizing communities. In this study, the series of Causal Loop Diagrams (CLDs) is to be elaborated and the System-Thinking (ST) approach is to be presented to understand the dynamic characteristics residing in the above development process of rebuilding communities. The ST approach refers to the CLDs analyzing 19 remarkable Korean CRP cases, and leads to a conclusion including some of policy instruments to support the bottom-up CRPs in Korea. This study contributes a theoretical framework to understand the dynamic relation between social capital and community revitalization as well as empirical suggestions to respond to the issues of the CRPs in Korean local governments.

• 로봇학회논문지
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• 제13권2호
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• pp.129-141
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• 2018

This paper proposes a unified framework that overcomes four motion constraints including joint limit, kinematic singularity, algorithmic singularity and obstacles. The proposed framework is based on our previous works which can insert or remove tasks continuously using activation parameters and be applied to avoid joint limit and singularity. Additionally, we develop a method for avoiding obstacles and combine it into the framework to consider four motion constraints simultaneously. The performance of the proposed framework was demonstrated by simulation tests with considering four motion constraints. Results of the simulations verified the framework's effectiveness near joint limit, kinematic singularity, algorithmic singularity and obstacles. We also analyzed sensitivity of our algorithm near singularity when using closed loop inverse kinematics depending on magnitude of gain matrix.

• 정보저장시스템학회논문집
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• 제3권1호
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• pp.5-12
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• 2007

This paper investigates the design of disturbance observer for rotational vibration suppression in disk drive systems. The design aims to provide an optimal controller which satisfies both vibration performance and robust stability. It consists of an inversion method, a special filter, and optimization scheme. Firstly a new inversion method is introduced, which provides more accurate inversion compared to conventional zero phase error method. The inversion is to deal with unstable zeros in the plant model. Secondly a special filter for disturbance selection is given, which features adjustable gain and band pass characteristics so that it enables flexible shaping of the loop considering the trade-off between performance and stability margins. And finally the parameters of disturbance observer are optimized in conjunction with external disturbance model. Simulation and experiment on commercial hard disk drives confirm that the design is very effective to such disturbance which is hard to be handled by conventional approach.

• ETRI Journal
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• 제19권3호
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• pp.228-241
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• 1997

In this paper, we present a design of modem and vocoder digital signal processor (DSP) chips for CDMA mobile station. The modem chip integrates CDMA reverse link modulator, CDMA forward link demodulator and Viterbi decoder. This chip contains 89,000 gates and 29 kbit RAMs, and the chip size is $10 mm{\times}10.1 mm$ which is fabricated using a $0.8{\mu}m$ 2 metal CMOs technology. To carry out the system-level simulation, models of the base station modulator, the fading channel, the automatic gain control loop, and the microcontroller were developed and interfaced with a gate-level description of the modem application specific integrated circuit (ASIC). The Modem chip is now successfully working in the real CDMA mobile station on its first fab-out. A new DSP architecture was designed to implement the Qualcomm code exited linear prediction (QCELP) vocoder algorithm in an efficient way. The 16 bit vocoder DSP chip has an architecture which supports direct and immediate addressing modes in one instruction cycle, combined with a RISC-type instruction set. This turns out to be effective for the implementation of vocoder algorithm in terms of performance and power consumption. The implementation of QCELP algorithm in our DSP requires only 28 million instruction per second (MIPS) of computation and 290 mW of power consumption. The DSP chip contains 32,000 gates, 32K ($2k{\times}16\;bit$) RAM, and 240k ($10k{\times}24\;bit$) ROM. The die size is $8.7\;mm{\times}8.3\;mm$ and chip is fabricated using $0.8\;{\mu}m$ CMOS technology.

• International Journal of Control, Automation, and Systems
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• 제2권3호
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• pp.374-383
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• 2004

This paper presents a neural network adaptive controller for autonomous diving control of an autonomous underwater vehicle (AUV) using adaptive backstepping method. In general, the dynamics of underwater robotics vehicles (URVs) are highly nonlinear and the hydrodynamic coefficients of vehicles are difficult to be accurately determined a priori because of variations of these coefficients with different operating conditions. In this paper, the smooth unknown dynamics of a vehicle is approximated by a neural network, and the remaining unstructured uncertainties, such as disturbances and unmodeled dynamics, are assumed to be unbounded, although they still satisfy certain growth conditions characterized by 'bounding functions' composed of known functions multiplied by unknown constants. Under certain relaxed assumptions pertaining to the control gain functions, the proposed control scheme can guarantee that all the signals in the closed-loop system satisfy to be uniformly ultimately bounded (UUB). Simulation studies are included to illustrate the effectiveness of the proposed control scheme, and some practical features of the control laws are also discussed.

• Journal of Power Electronics
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• 제3권3호
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• pp.185-196
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• 2003

In this paper, the single-phase static VAR compensator (SVC) is applied to regulate and stabilize the generated terminal voltage of the single-phase self-excited induction generator (single-phase SEIG) driven by a variable-speed prime mover (VSPM) under the conditions of the independent inductive load variations and the prime mover speed changes The conventional fixed gain PI controller-based feedback control scheme is employed to adjust the equivalent capacitance of the single-phase SVC composed of the fixed excitation capacitor FC in parallel with the thyristor switched capacitor TSC and the thyristor controlled reactor TCR The feedback closed-loop terminal voltage responses in the single-phase SEIG coupled by a VSPM with different inductive passive load disturbances using the single-phase SVC with the PI controller are considered and discussed herem. A VSPM coupled the single-phase SEIG prototype setup is established. Its experimental results are illustrated as compared with its simulation ones and give good agreements with the digital simulation results for the single-phase SEIG driven by a VSPM, which is based on the SVC voltage regulation feedback control scheme.

• Journal of Power Electronics
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• 제16권3호
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• pp.849-860
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• 2016

The high-switching-frequency operation of power converters can achieve high power density through size reduction of passive components, such as capacitors, inductors, and transformers. However, a small-output capacitor that has small capacitance and low effective series resistance changes the small-signal model of the converter power stage. Such a capacitor can make the converter unstable by increasing the crossover frequency in the transfer function of the small-signal model. In this paper, the design and implementation of a high-frequency LLC resonant converter are presented to verify the power density enhancement achieved by decreasing the size of passive components. The effect of small output capacitance is analyzed for stability by using a proper small-signal model of the LLC resonant converter. Finally, proper design methods of a feedback compensator are proposed to obtain a sufficient phase margin in the Bode plot of the loop gain of the converter for stable operation at 500 kHz switching frequency. A theoretical approach using MATLAB, a simulation approach using PSIM, and experimental results are presented to show the validity of the proposed analysis and design methods with 100 and 500 kHz prototype converters.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1998년도 하계학술대회 논문집 C
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• pp.1195-1199
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• 1998

In this paper a design method of robust power system stabilizers is proposed by means of robust linear quadratic regulator design technique under power system's operating condition change, which is caused by inner structure uncertainties and disturbances into a power system. It is assumed that the uncertainties present in the system are modeled as one equivalent signal. In this connections an optimal LQR control input for disturbance rejection, the output feedback gain for eliminating the disturbance are calculated. In this case. PSS input signal is obtained on the basis of weighted ${\Delta}P_e$ and $\Delta\omega$. In order to stabilize the overall control of system. Pole placement algorithm is applied in addition. making the poles of the closed loop system to move into a stable region in the complex plane. Some simulations have been conducted to verify the feasibility of the proposed control method on a machine to infinite bus power system. From the simulation results validation of the proposed method could be achieved by comparisons with the conventional PSS with phase lag-lead compensation.

• 대한전자공학회논문지TC
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• 제48권5호
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• pp.8-15
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• 2011

LTE-Advanced 시스템은 하향링크에서 1Gbps 상향링크에서 500Mbps 데이터 송신율을 목표로 한다. 이는 100MHz 이상의 스펙트럼 할당과 상향링크에서의 진보한 MIMO 안테나 기법에 의해 이루어진다. 본 논문은 LTE-A에서 정의하는 SC-FDMA 시스템 모델에서 LTE 하향링크의 코드북, SVD 코드북, EGT 코드북을 포함하는 상향링크 선부호화 기법을 분석한다. 마지막으로 SC-FDMA 기법에서도 발생하는 PAPR을 컴퓨터 시뮬레이션으로 분석하여, 비선형 전력 증폭기를 송신부에 고려한 채널 모델에서 동 이득 전송 기법이 다른 선 부호화 기법보다 우수함을 증명한다.