• Title/Summary/Keyword: loop gain

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Testing of CMOS Operational Amplifier Using Offset Voltage (오프셋 전압을 이용한 CMOS 연산증폭기의 테스팅)

  • Song, Geun-Ho;Kim, Gang-Cheol;Han, Seok-Bung
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.1
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    • pp.44-54
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    • 2001
  • In this paper, a novel test method is proposed to detect the hard and soft fault in analog circuits. The proposed test method makes use of the offset voltage, which is one of the op-amps characteristics. During the test mode, CUT is modified to unit gain op-amps with feedback loop. When the input of the op-amp is grounded, a good circuit has a small offset voltage, but a faulty circuit has a large offset voltage. Faults in the op-amp which cause the offset voltage exceeding predefined range of tolerance can be detected. In the proposed method, no test vector is required to be applied. Therefore the test vector generation problem is eliminated and the test time and cost is reduced. In this note, the validity of the proposed test method has been verified through the example of the dual slope A/D converter. The HSPICE simulations results affirm that the presented method assures a high fault coverage.

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KSR-III 김발엔진 구동장치 서보필터 설계

  • Sun, Byung-Chan;Jung, Ho-Lac
    • Aerospace Engineering and Technology
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    • v.1 no.2
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    • pp.105-112
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    • 2002
  • In this paper, a servo filter design for the gimbal engine actuator system of KSR-III(Korea Sounding Rocket-III) is considered. A reasonable filter structure is determined based on the actuator analytic models. The servo filter consists of a 2-nd order lowpass filter and a 1-st order compensator. The lowpass filter is required to protect the actuator from high frequency vibration, and the compensator to enhance the resulting stability. A Butterworth type servo filter is considered as the simplest one. The final servo filter type is determined by evaluating simultaneously both high frequency gain reduction performance and the corresponding KSR-III stability margin. Consequently it is revealed that a notch type servo filter located on the error between command signal and feedback signal in the control loop is very effective. Later, based on the proposed servo filter type, an onboard servo filter hardware of KSR-III will be designed and tested.

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On the Phase Variation and Implementation of If Module for WLL CDMA System (WLL용 CDMA 시스템 IF 모듈의 구현 및 위상 특성)

  • 강병권;김선형
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.4 no.1
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    • pp.219-226
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    • 2000
  • In this paper, we design and implement a IF(intermediate frequency) module for WLL(wireless local loop) CDMA(code division multiple access) basestation. The implemented IF transceiver is consists of transmitter, receiver and local oscillator. The considered signal bandwidth is 10 MHz and the local carrier frequency is 40 MHz. As test results, the If transmitter output power is -5dBm $\pm3dB$when the baseband input is -10dBm $\pm3dB$, and the IF receiver output power is -10dBm $\pm3dB$when the IF input is -5dBm $\pm3dB$. Also the AGC(automatic gain control) circuit has dynamic range of 9 dB from -7dBm to +2dBm with output power 2dBm. And the group delay characteristic is analyzed by comparing the phase delay from 1 MHz to 5 MHz and the phase distortion is very low. We can conclude that this IF system can be applied to high speed data rate communication system.

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Design and Implementation of Depolarized FOG based on Digital Signal Processing (All DSP 기반의 비편광 FOG 설계 및 제작)

  • Yoon, Yeong-Gyoo;Kim, Jae-Hyung;Lee, Sang-Hyuk
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.14 no.8
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    • pp.1776-1782
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    • 2010
  • The interferometric fiber optic gyroscopes (FOGs) are well known as sensors of rotation, which are based on Sagnac effect, and have been under development for a number of years to meet a wide range of performance requirements. This paper describes the development of open-loop FOG and digital signal processing techniques implemented on FPGA. Our primary goal was to obtain intermediate accuracy (pointing grade) with a good bias stability (0.22deg) and scale factor stability, extremely low angle random walk (0.07deg) and significant cost savings by using a single mode fiber. A secondary goal is to design all digital FOG signal processing algorithms with which the SNR at the digital demodulator output is enhanced substantially due to processing gain. The Cascaded integrator bomb(CIC) type of decimation filter only requires adders and shift registers, low cost processors which has low computing power still can used in this all digital FOG processor.

PWM Inverter System Control for Flywheel Energy Storage System using PDFF(Pseudo-Derivative Control with Feedforward Gain) Algorithm (PDFF 기법을 적용한 플라이휠 에너지 저장장치용 PWM 인버터 시스템 제어)

  • Park, Jong-Chan;Jeong, Byung-Hwan;Choi, Hee-Ryong;Choe, Gyu-Ha
    • The Transactions of the Korean Institute of Power Electronics
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    • v.12 no.3
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    • pp.267-275
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    • 2007
  • This paper presents about energy input and output modeling for a flywheel energy storage system that can store and supply mechanical energy, which is emerging as one of clean energy sources, and the analysis and control of a PWM inverter system. Moreover, this paper describes flywheel's characteristics related to variations of mechanical and electrical parameters like as voltage and current versus speed characteristics formed as numerical formula and thus simulate behaviour-status of flywheel energy. Also for comparison and analysis between PI control and PDFF control, the modeling, design and analysis to the single-phase full bridge inverter with double loop feedback control is accomplished through numerical description and simulation. Finally, under load condition 0.1[pu], 1[pu]. it is validated that harmonic characteristics for voltage and current wave is controlled within 5% below even dynamics condition.

Active Frequency with a Positive Feedback Anti-Islanding Method Based on a Robust PLL Algorithm for Grid-Connected PV PCS

  • Lee, Jong-Pil;Min, Byung-Duk;Kim, Tae-Jin;Yoo, Dong-Wook;Yoo, Ji-Yoon
    • Journal of Power Electronics
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    • v.11 no.3
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    • pp.360-368
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    • 2011
  • This paper proposes an active frequency with a positive feedback in the d-q frame anti-islanding method suitable for a robust phase-locked loop (PLL) algorithm using the FFT concept. In general, PLL algorithms for grid-connected PV PCS use d-q transformation and controllers to make zero an imaginary part of the transformed voltage vector. In a real grid system, the grid voltage is not ideal. It may be unbalanced, noisy and have many harmonics. For these reasons, the d-q transformed components do not have a pure DC component. The controller tuning of a PLL algorithm is difficult. The proposed PLL algorithm using the FFT concept can use the strong noise cancelation characteristics of a FFT algorithm without a PI controller. Therefore, the proposed PLL algorithm has no gain-tuning of a PI controller, and it is hardly influenced by voltage drops, phase step changes and harmonics. Islanding prediction is a necessary feature of inverter-based photovoltaic (PV) systems in order to meet the stringent standard requirements for interconnection with an electrical grid. Both passive and active anti-islanding methods exist. Typically, active methods modify a given parameter, which also affects the shape and quality of the grid injected current. In this paper, the active anti-islanding algorithm for a grid-connected PV PCS uses positive feedback control in the d-q frame. The proposed PLL and anti-islanding algorithm are implemented for a 250kW PV PCS. This system has four DC/DC converters each with a 25kW power rating. This is only one-third of the total system power. The experimental results show that the proposed PLL, anti-islanding method and topology demonstrate good performance in a 250kW PV PCS.

An Adaptive Differential Equal Gain Transmission Technique using M-PSK Constellations (M-PSK 성운을 이용한 적응형 차분 동 이득 전송 기술)

  • Kim, Young-Ju;Seo, Chang-Won
    • Journal of the Institute of Electronics and Information Engineers
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    • v.53 no.3
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    • pp.21-28
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    • 2016
  • We propose an adaptive scheme of a differential codebook for temporally correlated channels. And the codeword entries of the propose codebook are selected among the set of M-PSK constellations - the values of M proposed in this paper are 8, 16, or 32. Firstly, we analyze mathematically how the optimal spherical cap radius of the proposed codebook is tracked. Then, we explain the practical implementation of the proposed adaptive method. Practically, some candidate differential codebooks we propose in this paper can be switched according to the temporal correlation coefficients of wireless channels in the proposed scheme. Monte-Carlo simulations demonstrate that the achievable throughput performance employing the proposed codebook is always superior to those of the differential codebooks employing M-PSK constellations and non-adaptive differential codebooks with the same amount of feedback information.

Design of DSP based Depolarized Fiber Optic Gyroscope (DSP 기반의 비편광 광자이로스코프 설계)

  • Yoon, Yeong-gyoo;Joo, Min-sik;Kim, Yeong-jin;Kim, Jae-hyoung
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2009.10a
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    • pp.153-156
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    • 2009
  • The interferometric fiber optic gyroscopes (FOGs) are well known as sensors of rotation, which are based on Sagnac effect, and have been under development for a number of years to meet a wide range of performance requirements. This paper describes the development of open-loop FOG and digital signal processing techniques implemented on FPGA. Our primary goal was to obtain intermediate accuracy (pointing grade) with a good bias stability ($0.22^{\circ}/hr$) and scale factor stability, extremely low angle random walk ($0.07^{\circ}/\sqrt{hr}$) and significant cost savings by using a single mode fiber. A secondary goal is to design all digital FOG signal processing algorithms with which the SNR at the digital demodulator output is enhanced substantially due to processing gain. The CIC type of decimation block only requires adders and shift registers, low cost processors which has low computing power still can used in this all digital FOG processor.

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Preliminary numerical study on hydrogen distribution characteristics in the process that flow regime transits from jet to buoyancy plume in time and space

  • Wang, Di;Tong, Lili;Liu, Luguo;Cao, Xuewu;Zou, Zhiqiang;Wu, Lingjun;Jiang, Xiaowei
    • Nuclear Engineering and Technology
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    • v.51 no.6
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    • pp.1514-1524
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    • 2019
  • Hydrogen-steam gas mixture may be injected into containment with flow regime varying both spatially and transiently due to wall effect and pressure difference between primary loop and containment in severe accidents induced by loss of coolant accident. Preliminary CFD analysis is conducted to gain information about the helium flow regime transition process from jet to buoyancy plume for forthcoming experimental study. Physical models of impinging jet and wall condensation are validated using separated effect experimental data, firstly. Then helium transportation is analyzed with the effect of jet momentum, buoyancy and wall cooling discussed. Result shows that helium distribution is totally dominated by impinging jet in the beginning, high concentration appears near gas source and wall where jet momentum is strong. With the jet weakening, stable light gas layer without recirculating eddy is established by buoyancy. Transient reversed helium distribution appears due to natural convection resulted from wall cooling, which delays the stratification. It is necessary to concern about hydrogen accumulation in lower space under the containment external cooling strategy. From the perspective of experiment design, measurement point should be set at the height of connecting pipe and near the wall for stratification stability criterion and impinging jet modelling validation.

Additional Thermometer Code Locking Technique for Minimizing Quantization Error in Low Area Digital Controlled Oscillators (저면적 디지털 제어 발진기의 양자화 에러 최소화를 위한 추가 서모미터 코드 잠금 기법)

  • Byeongseok Kang;Young-Sik Kim;Shinwoong Kim
    • Journal of IKEEE
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    • v.27 no.4
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    • pp.573-578
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    • 2023
  • This paper introduces a new locking technique applicable to high-performance digital Phase-Locked Loops (DPLL). The study employs additional thermometer codes to reduce quantization errors in LC-based Digital Controlled Oscillators (DCO). Despite not implementing the entire DCO codes in thermometer mode, this method effectively reduces quantization errors through enhanced linearity. In the initial locking phase, binary codes are used, and upon completion of locking, the system transitions to thermometer codes, achieving high frequency linearity and reduced jitter characteristics. This approach significantly reduces the number of switches required and minimizes the oscillator's area, especially in applications requiring low DCO gain (Kdco), compared to the traditional method that uses only thermometer codes. Furthermore, the jitter performance is maintained at a level equivalent to that of the thermometer-only approach. The efficacy of this technique has been validated through modeling and design at the RTL level using SystemVerilog and Verilog HDL.