• Title/Summary/Keyword: loop bandwidth

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Design and Implementation of WWAN Antenna with Metal Structure for Increasing Frequency Bandwidth and Gain (안테나 대역폭과 이득 향상을 위한 금속 구조체가 적용된 WWAN 안테나의 설계 및 구현)

  • Lee, Keon-Myung;Cho, Il-Hoon;Cho, Young-Hee;Lee, In-Young;Kim, Young-Sik
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.21 no.9
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    • pp.940-946
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    • 2010
  • In this paper, we proposed the internal antenna on PCB(Planar Circuit Board) for achieving WWAN(Wireless Wide Area Network) operation in the laptop computer. The proposed antenna has a metal structure instead of printed pattern on PCB to improve the antenna characteristics for GSM850/900 bands. Compared to PCB embedded antenna without metal structure, the proposed antenna occupies similar area of $74{\times}11{\times}0.5\;mm^3$ with before and the bandwidth of the proposed one for GSM850/900 bands is increased 13 MHz than before. Further we confirmed that the proposed antenna has higher radiation gain of -4.45~-2.29 dBi for GSM850/900 bands than PCB embedded antenna without metal structure.

Stationary Reference Frame Voltage Controller for Single Phase Grid Connected Inverter for Stand Alone Mode (계통 연계형 단상 인버터의 단독 운전 모드를 위한 정지좌표계 전압 제어기)

  • Hong, Chang-Pyo;Kim, Hag-Wone;Cho, Kwan-Yuhl;Lim, Byoung-Kuk
    • The Transactions of the Korean Institute of Power Electronics
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    • v.20 no.6
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    • pp.517-525
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    • 2015
  • A grid connected inverter must be operated as the main electricity source under an isolated condition caused by the grid problem. Conventionally, the dual loop controller is used for the grid inverter, and the controller is used for control under the stand-alone mode. Generally, the PI(Proportional - Integral) controller is highly efficient under a synchronous reference frame, and stable control can be available. However, in this synchronous frame-based control, high-quality DSP is required because many sinusoidal calculations are necessary. When the PI control is conducted under a stationary frame, the controller constructions are made simple so that they work even with a low-price micro controller. However, given the characteristics of the PI controller, it should be designed with the phase of reference voltage considered. Otherwise, the phase delay of the output voltage can occur. Although the current controller also has a higher bandwidth than the voltage controller, distortion of the voltage is difficult to avoid only by the rapid response of the PI controller, as a sudden load change can occur in the nonlinear load. In this study, a new control method that solves the voltage controller bandwidth problem and rapidly copes with it even in the nonlinear load situation is proposed. The validity of the proposed method is proved by simulation and experimental results.

Investigation on the Nonideality of 12-Bit Sigma-Delta Modulator with a Signal Bandwidth of 1 MHz (1MHz 신호 대역폭출 갖는 12-비트 Sigma-Delta 변조기의 비이상성에 대한 조사)

  • 최경진;조성익;신홍규
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.26 no.11A
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    • pp.1812-1819
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    • 2001
  • In this paper, it investigated the permitted limit of the analog nonideality for the SOSOC Σ-Δ modulator design which is satisfied with 1 [MHz] signal bandwidth and 12-bit resolution in the OSR=25. Firstly, it get the SOSOC Σ-Δ modulator model and gain coefficient which is suitable in low voltage for the Σ-Δ modulator design which is satisfied with the specification in the supply voltage 3.3 [Vl. And it provided the performance prediction of the Σ-Δ modulator and the permitted limit of the nonideality by adding the performance degradation facts of the Σ-Δ modulator such as the finite gain of the amplifier, the SR, the closed-loop pole, the switch ON resistance and the capacitor mismatch to the ideal Σ-Δ modulator model. When designed the Σ-Δ modulator which is satisfied with the specification by the base above, it will be able to predict the performance of the Σ-Δ modulator and the guide for the specification of the circuit which composes the Σ-Δ modulator.

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Development of Ceramic Filter Using Non Radiative Microstrip Line In Millimeter-Wave (비방사 마이크로 스트립 선로를 이용한 밀리미터 대역의 세라믹 필터 개발)

  • Shin, Cheon-Woo;Kim, Tae-Heon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.32 no.6A
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    • pp.648-656
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    • 2007
  • This paper is about band pass filter, using Ceramics in the condition of center frequency 370Hz at milli-wave. The band pass filter is applied to Broadband Convergence Network, representing WLL(Wireless Local Loop) and LMDS(Local Multi-point Distribution Service). Sticking ceramic between strip line on a dielectric material substrate with which conductor's covers upper and basal surface, One will house the exterior by using structural resonance. In this Non Radiative Microstrip Line Filter structure, based upon simulations, generalized the two formulas finding resonant frequency of 1step ceramic resonator and bandwidth of 4step ceramic resonator. Also, As a result of experiment, using Network Analyzer, about created a experiment of structure based on the simulation result of 4-step ceramic resonator, It showed good characteristic of targeted bandwidth, comparing simulated result of 36.58GHz$\sim$37.650GHz with experimented result of 36.6GHz$\sim$37.65GHz.

Spur Reduced PLL with △Σ Modulator and Spur Reduction Circuit (델타-시그마 변조기와 스퍼 감소 회로를 사용하여 스퍼 크기를 줄인 위상고정루프)

  • Choi, Young-Shig;Han, Geun-Hyeong
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.11 no.5
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    • pp.531-537
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    • 2018
  • A novel PLL with a delta-sigma modulator and a spur reduction circuit is proposed. delta-sigma modulator makes the LF remove noise easily by moving the spur noise to a higher frequency band. Therefore, the magnitude of spur can be reduced the reasonable bandwidth. The spur reduction circuit reduces the spur size by reducing the LF voltage change generated during the period of reference signal. The spur reduction circuit is designed as simple as possible not to increase the size of PLL. The proposed PLL with the previous two techniques is designed with a supply voltage of 1.8V in a 0.18um CMOS process. Simulation results show an almost 20dB reduction in the magnitude of spur. The spur reduced PLL can be used in narrow bandwidth communication system.

Spur Reduced PLL with ΔΣ Modulator and Spur Reduction Circuit (델타-시그마 변조기와 스퍼 감소 회로를 사용하여 스퍼 크기를 줄인 위상고정루프)

  • Choi, Young-Shig;Han, Geun-Hyeong
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.11 no.6
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    • pp.651-657
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    • 2018
  • A novel PLL with a delta-sigma modulator and a spur reduction circuit is proposed. delta-sigma modulator makes the LF remove noise easily by moving the spur noise to a higher frequency band. Therefore, the magnitude of spur can be reduced the reasonable bandwidth. The spur reduction circuit reduces the spur size by reducing the LF voltage change generated during the period of reference signal. The spur reduction circuit is designed as simple as possible not to increase the size of PLL. The proposed PLL with the previous two techniques is designed with a supply voltage of 1.8V in a 0.18um CMOS process. Simulation results show an almost 20dB reduction in the magnitude of spur. The spur reduced PLL can be used in narrow bandwidth communication system.

A Highly Expandable Forwarded-Clock Receiver with Ultra-Slim Data Lane using Skew Calibration by Multi-Phase Edge Monitoring

  • Yoo, Byoung-Joo;Song, Ho-Young;Chi, Han-Kyu;Bae, Woo-Rham;Jeong, Deog-Kyoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.12 no.4
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    • pp.433-448
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    • 2012
  • A source-synchronous receiver based on a delay-locked loop is presented. It employs a shared global calibration control between channels, yet achieves channel expandability for high aggregate I/O bandwidth. The global calibration control accomplishes skew calibration, equalizer adaptation, and phase lock of all the channels in a calibration period, resulting in the reduced hardware overhead and area of each data lane. In addition, the weight-adjusted dual-interpolating delay cell, which is used in the multiphase DLL, guarantees sufficient phase linearity without using dummy delay cells, while offering a high-frequency operation. The proposed receiver is designed in the 90-nm CMOS technology, and achieves error-free eye openings of more than 0.5 UI across 9-28 inch Nelco4000-6 microstrips at 4-7 Gb/s and more than 0.42 UI at data rates of up to 9 Gb/s. The data lane occupies only $0.152mm^2$ and consumes 69.8 mW, while the rest of the receiver occupies $0.297mm^2$ and consumes 56.0 mW at the 7- Gb/s data-rate and supply voltage of 1.35 V.

Implementation and Design of Wideband IFIU using Aperture Open Loop Resonator and Reversed Phase Technique (역 위상 기법과 Aperture를 갖는 개방형 루프 공진기를 사용한 광대역 IF 모듈 설계 및 제작)

  • 김영완
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.41 no.11
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    • pp.17-23
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    • 2004
  • The implementation and design of the wideband IFIU using aperture open loop resonator and reversed phase technique to reduce the local oscillator leakage signal was represented in this paper. The local oscillator leakage signal is generated in stage of frequency conversion, especially in frequency conversion of fully digital modulation signal close to DC signal. The leakage signal and spurious signals, which have effects on adjacent channel or in-band channel as interference signals, were reduced below -60 dBc for 45 Mbps and 155 Mbps IF interface units. The group delay for both IFIUs shows low ripple characteristics of 15 ns and 8 ns, respectively. Also, the amplitude ripple characteristic in 150 MHz bandwidth with L-band center frequency satisfies the required specification of 2 dB. The implemented IFIU provides the required specifications for wideband satellite communication system.

A Design of Ultra Wide-Band Feedforward Amplifier Using Equal Group-Delayed Signal Canceller (동일 군속도 지연 신호 상쇄기를 이용한 광대역 Feedforward증폭기 설계)

  • Jeong Yong-Chae;Ahn Dal;Kim Hong-Gi;Kim Chul-Dong;Chang Ik-Soo
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.16 no.8 s.99
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    • pp.825-834
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    • 2005
  • In this paper, a new signal canceller that input signals are equally group-delayed and cancelled each other is proposed and feedforward linearizing power amplifier that adopt the proposed signal cancellers is fabricated. Although the conventional signal canceller can't matches the phase and the group delay time of input signals simultaneously, the proposed signal canceller matches those simultaneously. Simultaneous matching of the phase and the group delay time can makes wideband signal cancellation. The main signal cancellation loop of the fabricated feedforward amplifier with the proposed signal cancellers cancel input signal more than 26.3 dB and the intermodulation distortion signal cancellation loop cancel more than 15.2 dB for 200 MHz bandwidth. And the proposed feedforward power amplifier improves C/I ratio by 20.8 dB with two tones at 2,115 MHz, 2,165 MHz, respectively.

Design of Radiation Pattern Reconfigurable Antenna for Vital Signal Sensing Device Attached on Wristband and SAR Analysis on Human body (팔목 부착형 생체신호 측정기기에 사용가능한 방사패턴 재구성 안테나 설계 및 인체 SAR 영향 분석)

  • Lee, Chang Min;Jung, Chang Won
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.16 no.1
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    • pp.666-670
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    • 2015
  • This paper presents radiation pattern reconfigurable antenna for Fitbit Flex wristband which detects vital signal. Also, the paper presents Specific Absorption Rate (SAR) from the loop-dipole radiation pattern reconfigurable antenna based on the position of human body. The proposed loop-dipole radiation pattern reconfigurable antenna produces two opposite side direction radiation pattern using two RF switches. The resonant frequency of the radiation pattern reconfigurable antenna is Bluetooth communication bandwidth (2.4 - 2.485 GHz) and the maximum gain of the proposed antenna is 1.96 dBi. The proposed antenna satisfied the standard SAR value of 1.6 W/kg in 1 g tissue of the human body when the Bluetooth communication input average power of 0.04 W is excited to five parts of human body (head, chest, stomach, back, wrist). The maximum SAR value of in this simulation is presented in the part of head.