• Proceedings of the KIEE Conference
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• 1997.07b
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• pp.491-494
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• 1997

In this paper, we suppose a fuzzy logic controller for cruise control of vehicle. Generally, fuzzy logic controller is known as a controller which can be coped with a non-linear and a complex system. The proposed fuzzy logic controller consists of three input variables; that is, a desired speed, a current vehicle speed, and a current acceleration, and one output variable, throttle angle. The supposed fuzzy logic controller is for engine speed control system is implemented on 80586 microprocessor with DT-2801.

• International Journal of Fuzzy Logic and Intelligent Systems
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• v.6 no.3
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• pp.232-239
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• 2006

This paper is for applying interactive fuzzy linear programming for the problem of product mix planning, which is one of the aggregate planning problem. We developed a modified algorithm, which has two-phase approach for interactive fuzzy linear programming to get a better solution. Adding two-phase method, we expect to obtain not only the highest membership degree, but also a better utilization of each constrained resource.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.30A no.2
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• pp.76-85
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• 1993

This paper describes the design of a technology-independent logic, function, and timing extraction system from SPICE-like network descriptions. Technology-independent extraction mechanism is provided in the form of technology files containing the rules for constructing logic gates and functional blocks. The designed system can be more effectively used in cell-based design by describing the cells to be extracted. Timing extraction is performed by using a linear RC gate delay model which takes interconnection delay into account. Experimental results show that estimated delay is within 10 percents for logic gate circuits when compared with SPICE. Through higher-level design descriptions obtained by extraction, design cycles can be considerably reduces.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2004.05a
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• pp.568-574
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• 2004

On-line phase tracking of an extrinsic Fabry-Perot interferometer (EFPI) and experimental vibration control of a composite beam with a sensing-patch are investigated. We propose a sensing-patch for the compensation of the interferometric non-linearity. In this paper, a sensing-patch that comprises an EFPI and a piezo ceramic(PZT) is fabricated and the characteristics of the sensing-patch are experimentally investigated. A simple and practical logic is applied for the real-time tracking of optical phase of an interferometer. Experimental results show that the proposed sensing-patch does not have the non-linear behavior of conventional EFPI and hysteresis of piezoelectric material. Moreover, it has good strain resolution and wide dynamic sensing range. Finally, the vibration control with the developed sensing-patch has been performed using Fuzzy logic controller, and the possibility of sensing-patch as a sensoriactuator is considered.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 1998.10a
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• pp.244-249
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• 1998

Abstract-A speed controller of a induction motor using Microcontroller and Fuzzy logic is presented in the paper. Generally fuzzy logic controller is known as a controller which 춤 be coped with a non-linear and a complex system. A fuzzy logic is used for robust and fast speed control and space vector modulation method is used for PWM wave generation in this proposed system. The results of experiment show excellence of the proposed system and that the proposed system is appropriate to control the speed of a induction motor for industrial application

• International Journal of Fuzzy Logic and Intelligent Systems
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• v.12 no.2
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• pp.154-161
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• 2012

This article presents experimental studies of fuzzy logic application to control a two-wheel mobile robot(TWMR) system. The TWMR system is composed of two systems, an inverted pendulum system and a mobile robot system. Although linear controllers can stabilize the TWMR, fuzzy controllers are expected to have robustness to uncertainties so that the resulting performances are expected to be better. Nominal fuzzy rules are used to control balance and position of TWMR. Fuzzy logic is embedded on a DSP chip to control the TWMR. Balancing performances of the PID controller and the fuzzy controller under disturbances are compared through extensive experimental studies.

• Journal of the Institute of Electronics and Information Engineers
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• v.49 no.12
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• pp.209-218
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• 2012

Recently, the Field Programmable Stateful Logic Array (FPSLA) was proposed as one of the most promising system integration technologies which will extend the life of the Moore's law. This work is the first proposal of the FPSLA design automation flow, and the approaches to logic synthesis, synchronization, physical mapping, and automatic placement of the FPSLA designs. The synchronization at each gate for pipelining determines the x-coordinates of cells, and reduces the placement to 1-dimensional problems. The objective function and its gradients for the non-linear optimization of the net length and placement density have been remodeled for the reduced global placement problem. Also, a recursive algorithm has been proposed to legalize the placement by relaxing the density overflow of bipartite bin groups in a top-down hierarchical fashion. The proposed model and algorithm are implemented, and validated by applying them to the ACM/SIGDA benchmark designs. The output state of a gate in an FPSLA needs to be duplicated so that each fanout gate can be connected to a dedicated copy. This property has been taken into account by merging the duplicated nets into a hyperedge, and then, splitting the hyperedge into edges as the optimization progresses. This yields additional 18.4% of the cell count reduction in the most dense logic stage. The practicality of the FPSLA can be further enhanced primarily by incorporating into the logic synthesis the constraint to avoid the concentrated fains of gates on some logic stages. In addition, an efficient algorithm needs to be devised for the routing problem which is based on a complicated graph. The graph models the nanowire crossbar which is trimmed to be embedded into the FPSLA fabric, and therefore, asymmetric. These CAD tools can be used to evaluate the fabric efficiency during the architecture enhancement as well as automate the design.

• Smart Structures and Systems
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• v.14 no.6
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• pp.1131-1150
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• 2014

One of the issues in extending the range of applicable problems of real-time hybrid simulation is the computation speed of the simulator when large-scale computational models with a large number of DOF are used. In this study, functionality of real-time dynamic simulation of MDOF systems is achieved by creating a logic circuit that performs the step-by-step numerical time integration of the equations of motion of the system. The designed logic circuit can be implemented to an FPGA-based system; FPGA (Field Programmable Gate Array) allows large-scale parallel computing by implementing a number of arithmetic operators within the device. The operator splitting method is used as the numerical time integration scheme. The logic circuit consists of blocks of circuits that perform numerical arithmetic operations that appear in the integration scheme, including addition and multiplication of floating-point numbers, registers to store the intermediate data, and data busses connecting these elements to transmit various information including the floating-point numerical data among them. Case study on several types of linear and nonlinear MDOF system models shows that use of resource sharing in logic synthesis is crucial for effective application of FPGA to real-time dynamic simulation of structural response with time step interval of 1 ms.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.10a
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• pp.652-654
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• 2016

This paper shows the Design and implementation of sinusoidal BLDC motor drive logic using SVPWM method with FPGA. Sinusoidal BLDC motor driver logic consists of sine-wave PWM generator, dead-time and lead angle control logic. PWM generator logic is designed using SVPWM method for increase of 15.5% linear domain than general sine-wave PWM. This logic is verified and implemented using Spartan-6 FPGA Board. Test results show that THD(Total Harmonic Distortion) of motor-driving current is 19.2% and rotor position resolution is 1.6 degree.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.46 no.4
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• pp.40-45
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• 2009

In This Paper, New Efficient Arithmatic Logic Unit Design for Calculating Error Values of Reed Solomon Decoder is described. Error Values are solved by solving Linear system of Equations, So called Newtonian set of identity equations. Here We Need Galois Multiplier, Adder, Divider on GF($2^8$) field. We prove how the Hardware circuits are improved better than the classical circuits. The method to find error location is not covered here, since many other researchers have already deeply studied it.