• Title/Summary/Keyword: layout optimization

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A Study on the Cathodic Protection Design Optimization of Steel Piles for LNG Storage Tanks by Numerical Analysis (수치해석에 의한 LNG 저장탱크용 강관파일 전기방식 설계 최적화 연구)

  • Kim, Young Keun;Song, Hong Seok
    • Corrosion Science and Technology
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    • v.16 no.6
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    • pp.294-297
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    • 2017
  • For the longer service life of steel pile, cathodic protection is selected sometimes at corrosive environment. The cathodic protection design improvement was investigated in this study. The current demand for cathodic protection was calculated from the potentiostatic current monitoring of the steel specimen in the deaerated soil samples. In this study, the current distribution was studied using the Boundary Element Method (BEM) and the Finite Element Method (FEM) numerical analysis methods. The optimum layout of the anode was developed and confirmed by numerical analysis. Under the conventional design of the anode, the length of the anode hole is same as the pile length. We found that, at the bottom end of the pile, the current density is too high. When the anode hole length was 80% of the pile length, the current consumption at the end was reduced. The construction cost of anode hole drilling was decreased about 20%, as compared to the conventional design. Furthermore, the life of the anode materials could be extended by reducing the current consumption at the end section. Using this approach, the construction cost was reduced significantly without any under-protection area on the steel piles.

A Design Method on Power Sense FET to Protect High Voltage Power Device (고전압 전력소자를 보호하기 위한 Sense FET 설계방법)

  • Kyoung, Sin-Su;Seo, Jun-Ho;Kim, Yo-Han;Lee, Jong-Seok;Kang, Ey-Goo;Sung, Man-Young
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.22 no.1
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    • pp.12-16
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    • 2009
  • Current sensing in power semiconductors involves sensing of over-current in order to protect the device from harsh conditions. This technique is one of the most important functions in stabilizing power semiconductor device modules. The sense FET is very efficient method with low power consumption, fast sensing speed and accuracy. In this paper, we have analyzed the characteristics of proposed sense FET and optimized its electrical characteristics to apply conventional 450 V power MOSFET by numerical and simulation analysis. The proposed sense FET has the n-drift doping concentration $1.5{\times}10^{14}cm^{-3}$, size of $600{\um}m^2$ with $4.5\;{\Omega}$, and off-state leakage current below $50{\mu}A$. We offer the layout of the proposed sense FET to process actually. The offerd design and optimization methods are meaningful, which the methods can be applied to the power devices having various breakdown voltages for protection.

Maximum Node Interconnection by a Given Sum of Euclidean Edge Lengths

  • Kim, Joonmo;Oh, Jaewon;Kim, Minkwon;Kim, Yeonsoo;Lee, Jeongeun;Han, Sohee;Hwang, Byungyeon
    • Journal of information and communication convergence engineering
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    • v.17 no.4
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    • pp.246-254
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    • 2019
  • This paper proposes a solution to the problem of finding a subgraph for a given instance of many terminals on a Euclidean plane. The subgraph is a tree, whose nodes represent the chosen terminals from the problem instance, and whose edges are line segments that connect two corresponding terminals. The tree is required to have the maximum number of nodes while the length is limited and is not sufficient to interconnect all the given terminals. The problem is shown to be NP-hard, and therefore a genetic algorithm is designed as an efficient practical approach. The method is suitable to various probable applications in layout optimization in areas such as communication network construction, industrial construction, and a variety of machine and electronics design problems. The proposed heuristic can be used as a general-purpose practical solver to reduce industrial costs by determining feasible interconnections among many types of components over different types of physical planes.

A Simulation Study of Urban Public Transport Transfer Station Based on Anylogic

  • Liu, Weiwei;Wang, Fu;Zhang, Chennan;Zhang, Jingyu;Wang, Lei
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.15 no.4
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    • pp.1216-1231
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    • 2021
  • With the increase in the population of our cities and the rapid increase in the number of private cars, urban traffic has become more and more congested. At this stage, urban public transportation has become one of the main ways to improve urban traffic congestion. Aiming at the problem of how to improve the basic capacity of buses in multi-line transfer stations, this paper conducts simulation research based on anylogic software. Through micro-simulation analysis of vehicles entering, stopping, and exiting the station, combined with the delay model theory, the vehicle is given Stop organization optimization and station layout improvement methods, so that vehicles can run in the station more stably, smoothly and safely. Case analysis shows that applying this method to the roadside parking problem, the main and auxiliary bus stations have a significant improvement in operating capacity compared with the conventional tandem double bus stations, and the service level of the main and auxiliary bus stations has been significantly improved.

A Study on Lightweight Design of Cantilever-type Helideck Using Topology Design Optimization (위상 최적설계를 활용한 캔틸레버식 헬리데크 경량화 연구)

  • Jung, Tae-Won;Kim, Byung-Mo;Ha, Seung-Hyun
    • Journal of the Computational Structural Engineering Institute of Korea
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    • v.30 no.5
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    • pp.453-460
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    • 2017
  • In the offshore industry, helicopters are mainly used for transportation of goods or operating personnel between offshore sites and onshore facilities. A helideck is a structure that is required for landing and take-off of helicopters on the offshore structure. There are several shapes of helidecks depending on the type of offshore structures or installation location. Among them, cantilever-type helidecks usually provide more space on the topside of offshore structures and it is safer against potential accidents like fire or explosion. In this paper, the cantilever-type helideck is selected for the research object and topology design optimization is applied for lightweight design of the helideck. A finite element model is then created from the optimal layout of truss structures of the helideck, and structural analysis is performed under various landing conditions and wind loads. Based on the analysis results, the detailed section dimensions of structural members are determined so that the maximum stress at each structure member does not exceed the allowable stress of the structural material. Also, the final optimal design shows significant decrease in the total weight of the helideck.

Optimal Micrositing and Annual Energy Production Prediction for Wind Farm Using Long-term Wind Speed Correlation Between AWS and MERRA (AWS와 MERRA 데이터의 장기간 풍속보정을 통한 풍력터빈 최적배치 및 연간에너지생산량 예측)

  • Park, Mi Ho;Kim, Bum Suk
    • Transactions of the Korean Society of Mechanical Engineers B
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    • v.40 no.4
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    • pp.201-212
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    • 2016
  • A Wind resource assessment and optimal micrositing of wind turbines were implemented for the development of an onshore wind farm of 30 MW capacity on Gadeok Island in Busan, Republic of Korea. The wind data measured by the automatic weather system (AWS) that was installed and operated in the candidate area were used, and a reliability investigation was conducted through a data quality check. The AWS data were measured for one year, and were corrected for the long term of 30 years by using the modern era retrospective analysis for research and application (MERRA) reanalysis data and a measure- correlate-predict (MCP) technique; the corrected data were used for the optimal micrositing of the wind turbines. The micrositing of the 3 MW wind turbines was conducted under 25 conditions, then the best-optimized layout was analyzed with a various wake model. When the optimization was complete, the estimated park efficiency and capacity factor were from 97.6 to 98.7 and from 37.9 to 38.3, respectively. Furthermore, the annual energy production (AEP), including wake losses, was estimated to be from 99,598.4 MWh to 100,732.9 MWh, and the area was confirmed as a highly economical location for development of a wind farm.

Algorithm for Maximum Degree Vertex Partition of Cutwidth Minimization Problem (절단 폭 최소화 문제의 최대차수 정점 분할 알고리즘)

  • Sang-Un Lee
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.24 no.1
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    • pp.37-42
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    • 2024
  • This paper suggests polynomial time algorithm for cutwidth minimization problem that classified as NP-complete because the polynomial time algorithm to find the optimal solution has been unknown yet. To find the minimum cutwidth CWf(G)=max𝜈VCWf(𝜈)for given graph G=(V,E),m=|V|, n=|E|, the proposed algorithm divides neighborhood NG[𝜈i] of the maximum degree vertex 𝜈i in graph G into left and right and decides the vertical cut plane with minimum number of edges pass through the vertex 𝜈i firstly. Then, we split the left and right NG[𝜈i] into horizontal sections with minimum pass through edges. Secondly, the inner-section vertices are connected into line graph and the inter-section lines are connected by one line layout. Finally, we perform the optimization process in order to obtain the minimum cutwidth using vertex moving method. Though the proposed algorithm requires O(n2) time complexity, that can be obtains the optimal solutions for all of various experimental data

Improving the I/O Performance of Disk-Based Graph Engine by Graph Ordering (디스크 기반 그래프 엔진의 입출력 성능 향상을 위한 그래프 오더링)

  • Lim, Keunhak;Kim, Junghyun;Lee, Eunjae;Seo, Jiwon
    • KIISE Transactions on Computing Practices
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    • v.24 no.1
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    • pp.40-45
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    • 2018
  • With the advent of big data and social networks, large-scale graph processing becomes popular research topic. Recently, an optimization technique called Gorder has been proposed to improve the performance of in-memory graph processing. This technique improves performance by optimizing the graph layout on memory to have better cache locality. However, since it is designed for in-memory graph processing systems, the technique is not suitable for disk-based graph engines; also the cost for applying the technique is significantly high. To solve the problem, we propose a new graph ordering called I/O Order. I/O Order considers the characteristics of I/O accesses for SSDs and HDDs to improve the performance of disk-based graph engine. In addition, the algorithmic complexity of I/O Order is simple compared to Gorder, hence it is cheaper to apply I/O Ordering. I/O order reduces the cost of pre-processing up to 9.6 times compared to that of Gorder's, still its performance is 2 times higher compared to the Random in low-locality graph algorithms.

Optimization of the Korean Packaged Meal (Dosirak) Production Facilities for Food Service Delivered Long Distance (원격지 단체급식을 위한 포장용 도시락 생산설비의 최적화 연구)

  • Park, Hyung-Woo;Koh, Ha-Young;Park, Noh-Hyun;Kang, Tong-Sam;Mo, Su-Mi
    • Journal of the Korean Society of Food Culture
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    • v.3 no.1
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    • pp.89-93
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    • 1988
  • Because the production facilities of the Korean convenient food companies are placed in one space, the final products could be easily contaminated. It is necessary that the work space should be devided into contaminated zone, semisanitary zone and sanitary zone. The layout of the preparation facilities are reconsidered. Requirements for equipment and the facilities criteria be complemented with the air clean unit, and chilling refrigerator for rapid chilling of boiled rice and the cooked dishes for the assurance of the microbiological guality of foods. The equipment and the work space of the model companies which have the area of $99m^2,\;200m^2\;and\;300m^2$ are properly placed and designed in accordance with the regulations of the food sanitation and the architecture. (Packaging Meal Production Facilities).

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Dynamic Scheduling of Network Processes for Multi-Core Systems (멀티 코어 시스템에서 통신 프로세스의 동적 스케줄링)

  • Jang, Hye-Churn;Jin, Hyun-Wook;Kim, Hag-Young
    • Journal of KIISE:Computing Practices and Letters
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    • v.15 no.12
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    • pp.968-972
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    • 2009
  • The multi-core processors are being widely exploited by many high-end systems. With significant advances in processor architecture, the network band-width required on the high-end systems is increasing drastically. It is therefore highly desirable to manage multiple cores efficiently to achieve high network band-width with minimum resource requirements. Modern operating systems, however, still have significant design and optimization space to leverage the network performance over multi-core systems. In this paper, we suggest a novel networking process scheduling scheme, which decides the best processor affinity of networking processes based on the processor cache layout, communication intensiveness, and processor loads. The experimental results show that the scheduling scheme implemented in the Linux kernel can improve the network bandwidth and the effectiveness of processor utilization by 20% and 59%, respectively.