• Journal of the Korea Academia-Industrial cooperation Society
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• v.19 no.1
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• pp.105-112
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• 2018

This paper proposes a method for fabricating heatable glass using the conduction characteristics of metal thin films deposited on the surface of Low-e(Low emissivity) glass. The heating value of Low-e glass depends on the Joule heat caused by Low-e glass sheet resistance. Hence, its prediction and design are possible by measuring the sheet resistance of the material. In this study, silver electrodes were placed at 50 mm intervals on a soft Low-e glass sample with a low emissivity layer of 11 nm. This study measured the sheet resistance using a 4-point probe, predicted the power consumption and heating value of the Low-e glass, and confirmed the heating performance through fabrication and experience. There are two conventional methods for manufacturing heatable glass. One is a method of inserting nichrome heating wire into normal glass, and the other is a method of depositing a conductive transparent thin film on normal glass. The method of inserting nichrome heating wire is excellent in terms of the heating performance, but it damages the transparency of the glass. The method for depositing a conductive transparent thin film is good in terms of transparency, but its practicality is low because of its complicated process. This paper proposes a method for manufacturing heatable glass with the desired heating performance using Low-e glass, which is used mainly to improve the insulation performance of a building. That is by emitting a laser beam to the conductive metal film coated on the entire surface of the Low-e glass. The proposed method is superior in terms of transparency to the conventional method of inserting nichrome heating wire, and the manufacturing process is simpler than the method of depositing a conductive transparent thin film. In addition, the heat characteristics were compared according to the patterning of the surface thin film of the Low-e glass by an emitting laser and the laser output conditions suitable for Low-e glass.

• Journal of Radiation Industry
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• v.6 no.1
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• pp.31-40
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• 2012

There are two methods to fabricate the readout electronic to a large-area CMOS image sensor (LACIS). One is to design and manufacture the sensor part and signal processing electronics in a single chip and the other is to integrate both parts with bump bonding or wire bonding after manufacturing both parts separately. The latter method has an advantage of the high yield because the optimized and specialized fabrication process can be chosen in designing and manufacturing each part. In this paper, LACIS chip, that is optimized design for the latter method of fabrication, is presented. The LACIS chip consists of a 3-TR pixel photodiode array, row driver (or called as a gate driver) circuit, and bonding pads to the external readout ICs. Among 4 types of the photodiode structure available in a standard CMOS process, $N_{photo}/P_{epi}$ type photodiode showed the highest quantum efficiency in the simulation study, though it requires one additional mask to control the doping concentration of $N_{photo}$ layer. The optimized channel widths and lengths of 3 pixel transistors are also determined by simulation. The select transistor is not significantly affected by channel length and width. But source follower transistor is strongly influenced by length and width. In row driver, to reduce signal time delay by high capacitance at output node, three stage inverter drivers are used. And channel width of the inverter driver increases gradually in each step. The sensor has very long metal wire that is about 170 mm. The repeater consisted of inverters is applied proper amount of pixel rows. It can help to reduce the long metal-line delay.

• Journal of the Microelectronics and Packaging Society
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• v.25 no.4
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• pp.53-58
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• 2018

Since the scaling-down of IC devices has been reached to their physical limitations, several innovative packaging technologies such as 3D packaging, embedded packaging, and fan-out wafer level packaging (FOWLP) are actively studied. In this study the fabrication of organic-inorganic dielectric material was evaluated for the use of multi-structured redistribution layers (RDL) in FOWLP. Compared to current organic dielectrics such as PI or PBO an organic-inorganic hybrid dielectric called polysilsesquioxane (PSSQ) can improve mechanical, thermal, and electrical stabilities. polysilsesquioxane has also an excellent advantage of simultaneous curing and patterning through UV exposure. The polysilsesquioxane samples were fabricated by spin-coating on 6-inch Si wafer followed by pre-baking and UV exposure. With the 10 minutes of UV exposure polysilsesquioxane was fully cured and showed $2{\mu}m$ line-pattern formation. And the dielectric constant of cured polysilsesquioxane dielectrics was ranged from 2.0 to 2.4. It has been demonstrated that polysilsesquioxane dielectric can be patterned and cured by UV exposure alone without a high temperature curing process.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2003.06a
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• pp.1869-1872
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• 2003

As SLA(Sterealithography), SLS(Selective Laser Sintering), LOM(Laminated Object Manufacturing), FDM(Fused Deposition Modeling) etc. The FDM system the heart of a study and is developed by Stratasys co. ltd, in US., is small and cheap R.P. The material filament is heated until the material reaches a near-liquid state, it is pumped through a nozzle and become hand with a shape required, and this nozzle move pumping on the previously deposited material. Such FDM system that choice deposition type with X-Y plouter obtain in the thin continue layer by decreasing amount of extrusion or to central the injection amount when the head slow down at the corner, but in the process that fusion wax or resin become hand, deformation occur and it will affect the shape accuracy and the surface roughness. Such effect will depreciate quality and reliability of the product. Therefore, when the product made in actuality, the fundamental study on the basis geometry(surface, volume, line, angle) must be preceded and it have been research by many Free Form Fabrication. So, this basic object study purpose to obtain the fundamental geometry data and to enhance the surface roughness of the shape. And an operant can use the data for the progress of the surface roughness. This study research the estimation and application of the prototype surface roughness by adjustment the injection amount. And basie of this research, describe the pattern of prototype surface roughness and also used the result to estimate the surface of prototype.

• KSBB Journal
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• v.22 no.6
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• pp.433-437
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• 2007

A constant desire has been to fabricate nanopatterns for biochip and the Ultraviolet-nano imprint lithography (UV-NIL) is promising technology especially compared with thermal type in view of cost effectiveness. By using this method, nano-scale to micro-scale structures also called nanopore structures can be fabricated on large scale gold plate at normal conditions such as room temperature or low pressure which is not possible in thermal type lithography. One of the most important methods in fabricating biochips, immobilizing, was processed successfully by using this technology. That means immobilizing proteins only on the nanopore structures based on gold, not on hardened resin by UV is now possible by utilizing this method. So this selective nano-patterning process of protein can be useful method fabricating nanoscale protein chip.

• Transactions of Materials Processing
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• v.28 no.1
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• pp.21-26
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• 2019

Direct Laser Melting (DLM) of $Ti-xTiH_2$ (mixing ratio x = 2, 5, 10 wt.%) blended powder is characterized by producing porous titanium parts. When a high energy laser is irradiated on a $Ti-TiH_2$ blended powder, hydrogen gas ($H_2$) is produced by the accompanying decomposition of the $TiH_2$ powder, and acts as a pore-forming and activator. The hydrogen gas trapped in a rapidly solidified molten pool, which generates porosity in the deposited layer. In this study, the effects of a $TiH_2$ mixing ratio and the associated processing parameters on the development of a porous titanium were investigated. It was determined that as the content of $TiH_2$ increases, the resulting porosity density also increases, due to the increase of $H_2$ produced by $TiH_2$. Also, porosity increases as the scan speed increases. As fast solidified melting pools do not provide enough time for $H_2$ to escape, the faster the scan speed, the more the resulting $H_2$ is captured by the process. The results of this study show that the mixing ratio (x) and laser machining parameters can be adjusted to actively generate and control the porosity of the DLM parts.

• Progress in Superconductivity and Cryogenics
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• v.24 no.3
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• pp.47-51
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• 2022

With the innovative development of bio, pharmaceutical, and semiconductor technologies, it is essential to demand a next-generation transfer system that minimizes dust and vibrations generated during the manufacturing process. In order to develop dust-free and non-contact transfer systems, the high temperature superconductor (HTS) bulks have been applied as a magnet for levitation. However, sintered HTS bulk magnets are limited in their applications due to their relatively low critical current density (J_c) of several kA/cm² and low mechanical properties as a ceramic material. In addition, during cooling to cryogenic temperatures repeatedly, cracks and damage may occur by thermal shock. On the other hand, the bulk magnets made by stacked HTS tapes have various advantages, such as relatively high mechanical properties by alternate stacking of the metal and ceramic layer, high magnetic levitation performance by using coated conductors with high J_c of several MA/cm², consistent superconducting properties, miniaturization, light-weight, etc. In this study, we tried to fabricate HTS tapes stacked bulk magnets with 60 mm × 60 mm area and various numbers of HTS tape stacked layers for magnetic levitation. In order to examine the levitation forces of bulk magnets stacked with HTS tapes from 1 to 16 layers, specialized force measurement apparatus was made and adapted to measure the levitation force. By increasing the number of HTS tapes stacked layers, the levitation force of bulk magnet become larger. 16 HTS tapes stacked bulk magnets show promising levitation force of about 23.5 N, 6.538 kPa at 10 mm of levitated distance from NdFeB permanent magnet.

• Korean Chemical Engineering Research
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• v.57 no.1
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• pp.111-117
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• 2019

This study proposed the fabrication and deposition of high purity crystalline $core-TiO_2/shell-Al_2O_3$ nanoparticles. Morphological properties of $core-TiO_2$ and coated $shell-Al_2O_3$ were confirmed by transmission electron microscope (TEM) and transmission electron microscope - energy dispersive spectroscopy (TEM-EDS). The electrical properties of the prepared $core-TiO_2/shell-Al_2O_3$ nanoparticles were evaluated by applying them to a working electrode of a Dye-Sensitized Solar Cell (DSSC). The particle size, growth rate and the main crystal structure of $core-TiO_2$ were analyzed through dynamic light scattering system (DLS), scanning electron microscope (SEM) and X-ray diffraction (XRD). The $core-TiO_2$, which has a particle size of 17.1 nm, a thin film thickness of $20.1{\mu}m$ and a main crystal structure of anatase, shows higher electrical efficiency than the conventional paste-based dye-sensitized solar cell (DSSC). In addition, the energy conversion efficiency (6.28%) of the dye-sensitized solar cell (DSSC) using the $core-TiO_2/shell-Al_2O_3$ nanoparticles selectively controlled to the working electrode is 26.1% higher than the energy conversion efficiency (4.99%) of the dye-sensitized solar cell (DSSC) using the conventional paste method.

• JSTS:Journal of Semiconductor Technology and Science
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• v.7 no.3
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• pp.196-208
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• 2007

An analytical model is proposed for an optically controlled Metal Semiconductor Field Effect Transistor (MESFET), known as Optical Field Effect Transistor (OPFET) considering the diffusion fabrication process. The electrical parameters such as threshold voltage, drain-source current, gate capacitances and switching response have been determined for the dark and various illuminated conditions. The Photovoltaic effect due to photogenerated carriers under illumination is shown to modulate the channel cross-section, which in turn significantly changes the threshold voltage, drainsource current, the gate capacitances and the device switching speed. The threshold voltage $V_T$ is reduced under optical illumination condition, which leads the device to change the device property from enhancement mode to depletion mode depending on photon impurity flux density. The resulting I-V characteristics show that the drain-source current IDS for different gate-source voltage $V_{gs}$ is significantly increased with optical illumination for photon flux densities of ${\Phi}=10^{15}\;and\;10^{17}/cm^2s$ compared to the dark condition. Further more, the drain-source current as a function of drain-source voltage $V_{DS}$ is evaluated to find the I-V characteristics for various pinch-off voltages $V_P$ for optimization of impurity flux density $Q_{Diff}$ by diffusion process. The resulting I-V characteristics also show that the diffusion process introduces less process-induced damage compared to ion implantation, which suffers from current reduction due to a large number of defects introduced by the ion implantation process. Further the results show significant increase in gate-source capacitance $C_{gs}$ and gate-drain capacitance $C_{gd}$ for optical illuminations, where the photo-induced voltage has a significant role on gate capacitances. The switching time ${\tau}$ of the OPFET device is computed for dark and illumination conditions. The switching time ${\tau}$ is greatly reduced by optical illumination and is also a function of device active layer thickness and corresponding impurity flux density $Q_{Diff}$. Thus it is shown that the diffusion process shows great potential for improvement of optoelectronic devices in quantum efficiency and other performance areas.

• Applied Chemistry for Engineering
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• v.24 no.3
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• pp.247-252
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• 2013

Sulfonated poly(ether ether ketone) (SPEEK) with a certain degree of sulfonation were synthesized by reacting PEEK and sulfuric acid at different reaction time. Then ion-selective composite carbon electrodes (ISCCE) were fabricated by coating the prepared SPEEK on the surface of carbon electrodes. The specific capacitance and resistance of the ISCCE were analyzed by electrical impedance spectroscopy. The ion exchange capacities (IEC) of the SPEEKs were measured in the range of 1.60~2.57 meq/g depending on the sulfonation time. The SPEEK more than 2.5 meq/g of IEC was considered unsuitable for fabricating the ISCCE because it was dissolved in water. The specific capacitance of the prepared ISCCE increased with increasing the IEC of coated SPEEKs and the capacitance was improved up to about 20% compared to that of uncoated carbon electrode. In addition, the electrical resistance of coating layer decreased significantly with increasing the IEC of coated SPEEKs. It is expected that the desalination efficiency of conventional capacitive deionization process can be improved by using the prepared ISCCE coated with SPEEK.