• 전자공학회논문지A
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• 제31A권12호
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• pp.80-90
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• 1994

To develop VLSI of higher packing density with 0.5.mu.m gate length of less, semiconductor devices require shallow junction with higher doping concentration. the most common method to form the shallow junction is ion implantation, but in order to remove the implantation induced defect and activate the implanted impurities electrically, ion-implanted Si should be annealed at high temperature. In this annealing, impurities are diffused out and redistributed, creating deep PN junction. These make it more difficult to form the shallow junction. Accordingly, to miimize impurity redistribution, the thermal-budget should be kept minimum, that is. RTA needs to be used. This paper reports results of the diffusion characteristics of PSG film by varying Phosphorus weitht %/ Times and temperatures of RTA. From the SIMS.ASR.4-point probe analysis, it was found that low sheet resistance below 100 .OMEGA./ㅁand shallow junction depths below 0.2.mu.m can be obtained and the surface concentrations are measured by SIMS analysis was shown to range from 2.5*10$^{17}$ aroms/cm$^{3}$~3*10$^{20}$ aroms/cm$^{3}$. By depending on the RTA process of PSG film on Si, LDD-structured nMOSFET was fabricated. The junction depths andthe concentration of n-region were about 0.06.mu.m. 2.5*10$^{17}$ atom/cm$^{-3}$ , 4*10$^{17}$ atoms/cm$^{-3}$ and 8*10$^{17}$ atoms/cm$^{3}$, respectively. As for the electrical characteristics of nMOS with phosphorus junction for n- region formed by RTA, it was found that the characteristics of device were improved. It was shown that the results were mainly due to the reduction of electric field which decreases hot carriers.

• 전기전자학회논문지
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• 제20권2호
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• pp.163-166
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• 2016

It is important to operate the driving circuit under the optimal condition through precisely sensing the power consumption causing the temperature made mainly by the MOSFET (metal-oxide semiconductor field-effect transistor) when a BLDC (Brushless Direct Current) motor operates. In this letter, a Super-junction (SJ) power TMOSFET (trench metal-oxide semiconductor field-effect transistor) with an ultra-low specific on-resistance of $0.96m{\Omega}{\cdot}cm^2$ under the same break down voltage of 100 V is designed by using of the SILVACO TCAD 2D device simulator, Atlas, while the specific on-resistance of the traditional power MOSFET has tens of $m{\Omega}{\cdot}cm^2$, which makes the higher power consumption. The SPICE simulation for measuring the power distribution of 25 cells for a chip is carried out, in which a unit cell is a SJ Power TMOSFET with resistor arrays. In addition, the power consumption for each unit cell of SJ Power TMOSFET, considering the number, pattern and position of bonding, is computed and the power distribution for an ANSYS model is obtained, and the SJ Power TMOSFET is designed to make the power of the chip distributed uniformly to guarantee it's reliability.

• 한국태양에너지학회 논문집
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• 제36권4호
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• pp.41-47
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• 2016

A bypass diode is connected in parallel to solar cells with opposite polarity. The advantage of using the bypass diode is circumvented a destructive efforts of hot-spot heating in the photovoltaic(PV) module. In addition, it is possible to reduce a energy loss under the partial shading on the PV module. This paper presents a characteristic of photovoltaic module under partial shading condition and with defective bypass diode by using the experimental data. The results of field testing for each photovoltaic modules, when photovoltaic system which is connected power grid is operating, the inner junction-box temperature of shading photovoltaic module is high $5^{\circ}C$ because of difference of flowing current through into bypass diode. And incase of not operating photovoltaic system, the inner junction-box temperature of module with defective bypass diode is greatly higher than partial shading PV module.

• 한국초전도ㆍ저온공학회논문지
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• 제24권4호
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• pp.6-10
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• 2022

We report on the fabrication and measurements of metallic Josephson junctions (JJs) consisting of Au nanoribbon and NbTi superconducting electrodes. The maximum supercurrent density in the junction reaches up to ~ 3×10⁵ A/cm² at 2.5 K, much larger than that of JJ using single-crystalline Au nanowire. Temperature dependence of the critical current exhibits an exponential decay behavior with increasing temperature, which is consistent with a long and diffusive junction limit. Under the application of a magnetic field, monotonous decrease of the critical current was observed due to a narrow width of the Au nanoribbon. Our observatons suggest that NbTi/Au/NbTi JJ would be a useful platform to develop an integrated superconducing quantum circuit combined with the superconducting coplanar waveguide and ferromagnetic π junctions.

• 한국초전도학회:학술대회논문집
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• 한국초전도학회 1999년도 High Temperature Superconductivity Vol.IX
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• pp.13-15
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• 1999

A Josephson sampler circuit using high-Tc superconductor (HTS) ramp-edge junctions has been designed, fabricated, and experimentally tested. It consists of five ramp-edge junctions with a stacked groundplane and is based on single-flux-quantum (SFQ) operations. The sampler was used to measure current waveforms at picosecond and microampere resolutions. We are developing a system based on the sampler for measuring the current waveform in a room-temperature sample. And measuring current flowing through wiring in a semiconductor large-scale integrated circuit is a promising application for the HTS sampler system.

• Progress in Superconductivity
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• 제1권2호
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• pp.81-84
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• 2000

A Josephson sampler circuit using high-Tc superconductor (HTS) ramp-edge junctions has been designed, fabricated, and experimentally tested. It consists of five ramp-edge junctions with a stacked groundplane and is based on single-flux-quantum (SFQ) operations. The sampler was used to measure current waveforms at picosecond and microampere resolutions. We are developing a system based on the sampler for measuring the current waveform in a room-temperature sample. And measuring current flowing through wiring in a semiconductor large-scale integrated circuit is a promising application for the HTS sampler system.

• 한국초전도저온공학회:학술대회논문집
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• 한국초전도저온공학회 2003년도 학술대회 논문집
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• pp.75-77
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• 2003

We have measured the escape rates of the Nb Josephson junction from its zero-voltage state. The critical current measurements were carried out in repeatedly sweeping the current-voltage characteristics of the junction with a current ramp. From the distribution of the critical current the escape temperature was determined by applying the thermal activation model.

• 센서학회지
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• 제27권1호
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• pp.40-46
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• 2018

In this paper, we focus on optimization of a boron ($^{11}B$)-implanted n type Si epi substrate for obtaining near-zero temperature coefficient of resistance (TCR) at temperature range from 25 to $125^{\circ}C$. The $^{11}B$-implantation on the N type-Si epi substrate formed isolation from the rest of the N-type Si by the depletion region of a PN junction. The TCR increased as the temperature of rapid thermal anneal (RTA) was increased at the temperature range from $900^{\circ}C$ to $1000^{\circ}C$ for the $p^+$ contact with implantation at dose of $1E16/cm^2$, but sheet resistance of this film was decreased. After the optimization of anneal process condition, the TCR of $1126.7{\pm}30.3$ (ppm/K) was obtained for the $p^-$ resistor-COB package chips contained $p^+$ contact with the implantation of $5E14/cm^2$. This shows the potential of the $^{11}B$-implanted n type Si epi substrate as a resistor for pressure sensor in thermal stable environment applications..

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 1998년도 춘계종합학술대회
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• pp.405-408
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• 1998

본 논문에서는, 백금 실리사이드와 실리콘 접합에서 n형 실리콘 기판의 농도와 온도 변화(상온, 55$^{\circ}C$, 75$^{\circ}C$)에 따라서 전류-전압 특성을 분석하였다. 측정한 전기적 파라미터들은 순방향 임계전압, 역방향 항복전압, 장벽높이(øbn), 포화전류, 이상인자와 동적저항의 변화이다. 결과로써, 기판 농도의 변화에 따라서는 순방향 임계전압, 역방향 항복전압, 장벽 높이, 동적저항은 감소하였으나 포화전류와 이상인자는 증가하였다. 온도 변화에 따라서는 역방향 항복전압과 동적저항이 증가하였다.

• Journal of Magnetics
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• 제7권3호
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• pp.63-71
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• 2002

Three fabrication techniques for forming thin barrier layer with uniform thickness and large barrier height in magnetic tunnel junction (MTJ) are discussed. First, the effect of immiscible element addition to Cu layer, a high conducting layer generally placed under the MTJ, is investigated in order to reduce the surface roughness of the bottom ferromagnetic layer, on which the barrier is formed. The Ag addition to the Cu layer successfully realizes the smooth surface of the ferromagnetic layer because of the suppression of the grain growth of Cu. Second, a new plasma source, characterized as low electron energy of 1 eV and high density of $10^{12}$ $cm^{-3}$, is introduced to the Al oxidation process in MTJ fabrication in order to reduce damages to the barrier layer by the ion-bombardment. The magnetotransport properties of the MTJs are investigated as a function of the annealing temperature. As a peculiar feature, the monotonous decrease of resistance area product (RA) is observed with increasing the annealing temperature. The decrease of the RA is due to the decrease of the effective barrier width. Third, the influence of the mixed inert gas species for plasma oxidization process of metallic Al layer on the tunnel magnetoresistance (TMR) was investigated. By the use of Kr-O$_2$ plasma for Al oxidation process, a 58.8 % of MR ratio was obtained at room temperature after annealing the junction at $300{^{\circ}C}$, while the achieved TMR ratio of the MTJ fabricated with usual Ar-$0_2$ plasma remained 48.4%. A faster oxidization rate of the Al layer by using Kr-O$_2$ plasma is a possible cause to prevent the over oxidization of Al layer and to realize a large magnetoresistance.