• Title/Summary/Keyword: ion beam etching

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Nanohole Fabrication using FIB, EB and AFM for Biomedical Applications

  • Zhou, Jack;Yang, Guoliang
    • International Journal of Precision Engineering and Manufacturing
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    • v.7 no.4
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    • pp.18-22
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    • 2006
  • Although many efforts have been made in making nanometer-sized holes, there is still a major challenge in fabricating individual single-digit nanometer holes in a more controllable way for different materials, size distribution and hole shapes. In this paper we describe our efforts to use a top down approach in nanofabrication method to make single-digit nanoholes. There are three major steps towards the fabrication of a single-digit nanohole. 1) Preparing the freestanding thin film by epitaxial deposition and electrochemical etching. 2) Making sub-micro holes ($0.2{\mu}\;to\;0.02{\mu}$) by focused ion beam (FIB), electron beam (EB), atomic force microscope (AFM), and others methods. 3) Reducing the hole size to less than 10 nm by epitaxial deposition, FIB or EB induced deposition and micro coating. Preliminary work has been done on thin films (30 nm in thickness) preparation, sub-micron hole fabrication, and E-beam induced deposition. The results are very promising.

실리콘 기판위의 증착된 AAO Barrier Layer의 $Cl_2/BCl_3$ Neutral Beam Etching

  • Kim, Chan-Gyu;Min, Gyeong-Seok;O, Jong-Sik;Yeom, Geun-Yeong
    • Proceedings of the Korean Institute of Surface Engineering Conference
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    • 2011.05a
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    • pp.135-136
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    • 2011
  • 본 연구에서는 실리콘 기판위의 형성된 AAO (Anodic Aluminum Oxide)의 barrier layer를 $Cl_2/BCl_3$ gas mixture에서 Neutral Beam Etching (NBE)과 Ion Beam Etching (IBE)로 각각 식각한 후 그 결과를 비교하였다. 이온빔의 경우 나노사이즈의 AAO pore의 charging에 의해 pore 아래쪽의 위치한 barrier layer를 어떤 식각조건에서도 제거하지 못하였다. 하지만, charging effect가 없고, 높은 중성화율을 나타내는 low angle forward reflected 방식의 neutral beam etching (NBE)에서는 $BCl_3$-rich $Cl_2/BCl_3$ gas mixture인 식각조건에서 AAO pore에 휘발성 $BO_xCl_y$를 형성하면서 barrier layer를 제거할 수 있었다.

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Layer-by-layer Control of MoS2 Thickness by ALET

  • Kim, Gi-Hyeon;Kim, Gi-Seok;Yeom, Geun-Yeong
    • Proceedings of the Korean Vacuum Society Conference
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    • 2015.08a
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    • pp.234.1-234.1
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    • 2015
  • Molybdenum disulfide (MoS2)는 van der Waals 결합을 통한 층상구조의 물질로써 뛰어난 물리화학적, 기계적 특성으로 Field Effect Transistors (FETs), Photoluminescence, Photo Detectors, Light Emitters 등의 많은 분야에서 연구가 보고 되어지고 있는 차세대 2D-materials이다. 이처럼 MoS2 가 다양한 범위에 응용될 수 있는 이유는 layer 수가 증가함에 따라 1.8 eV의 direct band gap 에서 1.2 eV 의 indirect band-gap으로 특성이 변화할 뿐만 아니라 다양한 고유의 전기적 특성을 지니고 있기 때문이다. 그러나 MoS2 는 원자층 단위의 layer control 이 어렵다는 이유로 다양한 전자소자 응용에 많은 제약이 보고 되어졌다. 본 연구에서는 MoS2 의 layer를 control 하기 위해 ICP system 에서 mesh grid 를 삽입하여 Cl2 radical을 효과적으로 adsorption 시킨 뒤, Ion beam system 에서 Ar+ Ion beam 을 통해 한 층씩 제거하는 방식의 atomic layer etching (ALE) 공정을 진행하였다. ALE 공정시 ion bombardment 에 의한 damage 를 최소화하기 위해 Quadruple Mass Spectrometer (QMS) 를 통한 에너지 분석으로 beam energy 를 20 eV에서 최적화 할 수 있었고, Raman Spectroscopy, X-ray Photoelectron Spectroscopy (XPS), Atomic Force Microscopy(AFM) 분석을 통해 ALE 공정에 따른 MoS2 layer control 가능 여부를 증명할 수 있었다.

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Contact block copolymer technique을 이용한 실리콘 나노-필라 구조체 제작방법

  • Kim, Du-San;Kim, Hwa-Seong;Park, Jin-U;Yun, Deok-Hyeon;Yeom, Geun-Yeong
    • Proceedings of the Korean Vacuum Society Conference
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    • 2015.08a
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    • pp.189-189
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    • 2015
  • Plasmonics, sensor, field effect transistors, solar cells 등 다양한 적용분야를 가지는 실리콘 구조체는 제작공정에 의해 전기적 및 광학적 특성이 달라지기 때문에 적합한 나노구조 제작방법이 요구되고 있다. 나노구조체 제작방법으로는 Photo lithography, Extreme ultraviolet lithography (EUV), Nano imprinting lithography (NIL), Block copolymer (BCP) 방식의 방법들이 연구되고 있으며, 특히 BCP는 direct self-assembly 특성을 가지고 있으며 가격적인 면에서도 큰 장점을 가진다. 하지만 BCP를 mask로 사용하여 식각공정을 진행할 경우 BCP가 버티지 못하고 변형되어 mask로서의 역할을 하지 못한다. 이러한 문제를 해결하기 위하여 본 논문에서는 BCP와 질화막을 이용한 double mask 방법을 사용하였다. 기판 위에 BCP를 self-assembly 시키고 mask로 사용하여 hole 부분으로 노출된 기판을 Ion gun을 통해 질화 시킨 후에 BCP를 제거한다. 기판 위에 hole 모양의 질화막 표면은 BCP와 다르게 etching 공정 중 변형되지 않는다. 이러한 질화막 표면을 mask로 사용하여 pillar pattern의 실리콘 나노구조체를 제작하였다. 질화막 mask로 사용되는 template은 PS와 PMMA로 구성된 BCP를 사용하였다. 140kg/mol의 polystyrene과 65kg/mol의 PMMA를 톨루엔으로 용해시키고 실리콘 표면 위에 spin coating으로 도포하였다. Spin coat 후 230도에서 40시간 동안 열처리를 진행하여 40nm의 직경을 가진 PS-b-PMMA self-assembled hole morphology를 형성하였다. 질화막 형성 및 etching을 위한 장비로 low-energy Ion beam system을 사용하였다. Reactive Ion beam은 ICP와 3-grid system으로 구성된 Ion gun으로부터 형성된다. Ion gun에 13.56 MHz의 frequency를 갖는 200W 전력을 인가하였다. Plasma로부터 나오는 Ion은 $2{\Phi}$의 직경의 hole을 가지는 3-grid hole로 추출된다. 10~70 voltage 범위의 전위를 plasma source 바로 아래의 1st gird에 인가하고, 플럭스 조절을 위해 -150V의 전위를 2nd grid에 인가한다. 그리고 3rd grid는 접지를 시켰다. chamber내의 질화 및 식각가스 공급은 2mTorr로 유지시켰다. 그리고 기판의 온도는 냉각칠러를 이용하여 -20도로 냉각을 진행하였다. 이와 같은 공정 결과로 100 nm 이상의 높이를 갖는 40 nm직경의 균일한 Silicon pillar pattern을 형성 할 수 있었다.

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Effect of $Ga^+$ Ion Beam Irradiation On the Wet Etching Characteristic of Self-Assembled Monolayer ($Ga^+$ 이온 빔 조사량에 따른 자기 조립 단분자막의 습식에칭 특성)

  • Noh Dong-Sun;Kim Dea-Eun
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2005.10a
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    • pp.326-329
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    • 2005
  • As a flexible method to fabricate sub-micrometer patterns, Focused Ion Beam (FIB) instrument and Self-Assembled Monolayer (SAM) resist are introduced in this work. FIB instrument is known to be a very precise processing machine that is able to fabricate micro-scale structures or patterns, and SAM is known as a good etch resistance resist material. If SAM is applied as a resist in FIB processing fur fabricating nano-scale patterns, there will be much benefit. For instance, low energy ion beam is only needed for machining SAM material selectively, since ultra thin SAM is very sensitive to $Ga^+$ ion beam irradiation. Also, minimized beam spot radius (sub-tens nanometer) can be applied to FIB processing. With the ultimate goal of optimizing nano-scale pattern fabrication process, interaction between SAM coated specimen and $Ga^+$ ion dose during FIB processing was observed. From the experimental results, adequate ion dose for machining SAM material was identified.

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Fabrication of $0.25 \mu\textrm{m}$ P-HEMT for X-band Low Noise Amplifier (X-밴드 저잡음 증폭기용 $0.25 \mu\textrm{m}$ T-형 게이트 P-HEMT 제작)

  • 이강승;정윤하
    • Proceedings of the IEEK Conference
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    • 2000.11b
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    • pp.17-20
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    • 2000
  • We have enhanced the yield of 0.25 ${\mu}{\textrm}{m}$ T-gate $Al_{0.25}$G $a_{0.75}$As/I $n_{0.2}$G $a_{0.8}$As P-HEMT using three-layer E-beam lithography process and selective etching process. The three-layer resist structure (PMMA/copolymer/ PMMA=2000 $\AA$/3000 $\AA$/2000 $\AA$) and three developers (Benzene:IPA=1:1,Methanol:IPA =1:1,MIBK:IPA=1:3) were used for fabrication of a wide-head T-gate by the conventional double E-beam exposure technology. Also 1 wt% citric acid: $H_2O$$_2$:N $H_{4}$OH(200m1:4ml:2.2ml) solution were used for uniform gate recess. The etching selectivity of GaAs over $Al_{0.25}$G $a_{0.75}$As is measured to be 80. So these P-HEMT processes can be used in X-band MMIC LNA fabrication.ion.ion.ion.

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Silicon microstructure prepared by a dry etching (Dry Etching에 의해 제작된 실리콘 미세 구조물)

  • 홍석민;임창덕;조정희;안일신;김옥경
    • Journal of the Korean Vacuum Society
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    • v.6 no.3
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    • pp.242-248
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    • 1997
  • Porous silicons were prepared by dry etching as well as by chemical etching. The latter is a conventional method used by many researchers. Meanwhile, the former is a new method we developed. Also the porous silicon structure was made by E-beam lithography technique. However, due to the limit of this technique, minimum size we could produce was about 0.3 $\mu\textrm{m}$ in diameter on silicon wafer. In a new method, the porous silicon microstructure was fabricated by using Reactive Ion Etching method after covering with diamond powder on 4 inch wafer by using spin coater. In this method, diamond powder acted as a mask. The morphology of samples prepared under many different conditions were analysed be SEM and AFM. And we measured PL spectra for the samples. Based on these results, we observed the structure of a few hundreds $\AA$ in size from porous silicon which was made by dry etching with diamond powder. Also the PL peak for these samples lied around 590 nm compared to 760 nm for chemically etched porous silicon.

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Full 3D Level Set Simulation of Nanodot Fabrication using FIBs

  • Kim, Heung-Bae
    • Applied Science and Convergence Technology
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    • v.25 no.5
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    • pp.98-102
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    • 2016
  • The level set method has recently become popular in the simulation of semiconductor processes such as etching, deposition and photolithography, as it is a highly robust and accurate computational technique for tracking moving interfaces. In this research, full three-dimensional level set simulation has been developed for the investigation of focused ion beam processing. Especially, focused ion beam induced nanodot formation was investigated with the consideration of three-dimensional distribution of redeposition particles which were obtained by Monte-Carlo simulation. Experimental validations were carried out with the nanodots that were fabricated using focused $Ga^+$ beams on Silicon substrate. Detailed description of level set simulation and characteristics of nanodot formation will be discussed in detail as well as surface propagation under focused ion beam bombardment.