• 전력전자학회:학술대회논문집
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• 전력전자학회 1998년도 연구회 합동 학술발표회 논문집
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• pp.5-8
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• 1998

The adaptation to vector control theory is so generalized that it is widely used for implementing the high-performance of AC machine. Nowadays, One-Chip microprocessors or DSP chips are being well-used to implement Vector Control algorithm. DSP Chip have less flexibility for memory decoding and I/O rather than One-Chip microprocessor so that is requires more additional circuit and high cost. And the past One-Chip micro processors have difficult of implementation the complex algorithm because of small memory capacity and low arithmetic performance. Therefore we implemented the vector control algorithm of PMSM(Permanent Magnetic Synchronous Motors) using 80296SA form intel , which have many features as 6M memory space, 500MHz clock frequency, including memory decoding circuit and general I/O, Special I/O(EPA, Interrupt controller, Timer/Count, PWM generator) which is proper controller for the complex algorithm or operation program requiring so much memory capacity, So in this paper we fully digitized the vector control of PMSM included SVPWM Voltage controller using the intel 80296SA

• 한국정보통신설비학회:학술대회논문집
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• 한국정보통신설비학회 2008년도 정보통신설비 학술대회
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• pp.327-330
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• 2008

This paper shows an implementation of WLAN-based Audio/Video(A/V) system for multimedia home networks. Proposed WLAN-based A/V system can transmit multimedia data of high quality. The entire system consists of a 16-bit RISC controller, a program ROM, a SRAM, timers, an interrupt controller, a DART, GPIOs, an I2C and the OFDM modem supporting for the IEEE 802.11g standard. The simple MAC functions are implemented by firmware on an embedded 16-bit RISC controller. The OFDM modem supports a complete set of data rates up to 54Mbps. Proposed the system is implemented by an Altera FPGA EP1S60F1020C6 device, a 10-bit 2-ch DAC, a 10-bit 2-ch ADC and RF/IF chips.

• 한국정보처리학회논문지
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• 제3권5호
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• pp.1229-1239
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• 1996

TV 방송의 부가적인 정보 제공이 활발해지면서 그래픽 중첩 프로세서에 대한 요구가 증대되고 있다. 본 논문에서는 한국형 방송 프로그램 시스템 (Korea Broadcast Programming System: KBPS) 표준안을 만족시키는 KBPS 디코더 ASSP(Application Specific Standard Product)를 설계하고 제작하여 기능을 검증 한다. KBPS 디코더 ASSP는 8 비트 마이크 로프로세서 Z80을 내장하며 그래픽 중첩 제어기, KBPS 스케쥴 디코더, 메모리 제어기, 우선 순위 인터럽트 제어기, 미디 제어기, 적외선 리모콘 수신기, 비동기직렬 통신 제어기, 타이머, 버스 제어기, 범용 병렬 입출력 포트 및 직병렬 인터페이스로 구성한다. 설계한 칩은 0.8 미크론 CMOS 게이트 어레이로 제작하였으며, 약 31,500 게이트가 소요되었고, 14.318MHz 에서 정상 동작하였다.

• 전자공학회논문지A
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• 제32A권9호
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• pp.142-151
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• 1995

The trend of compact size, light weight, low power consumption in the portable telecommunication equipments demands large scale integration and low voltage operation of chips and the minimization of the number of the components in the telecommunication terminal. According to the trend, existing chip components are modulized and are integrated as a part into a bigger chip. This paper is about the development of the peripheral units of micro-controller for mobile telecommunication terminal. Peripherals consist of DMA controller, Interrupt controller, timer, watchdog timer, clock generator, and power management unit. They are designed to be integrated with EU(Execution Unit) and BIU(Bus Interface Unit) into a 16 bit micro-controller which will be used as a core of an ASIC for next generation digital mobile telecommunication terminal. At first, whole block of the micro-controller was described by VHDL behavioral model and simulated to verify its overall operation. Then, watchdog timer, clock generator and power management unit were directly synthesized by using VHDL synthesis tool. Rest of the pheriperal units were designed and simulated by using Compass Design Tool.

• 한국공작기계학회:학술대회논문집
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• 한국공작기계학회 1997년도 추계학술대회 논문집
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• pp.48-53
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• 1997

The objective of this paper is to present the development and application of interface software between robot and F/T sensor for force control. The interface software for among the robot controller, F/T sensor, and host PC is based on interrupt-driven method. To show the suitability of developed interface software, writing-task is performed in real time using F/T sensor that mounts on the wrist of the robot and Scara type 4-axis robot.

• 한국마린엔지니어링학회:학술대회논문집
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• 한국마린엔지니어링학회 2011년도 후기공동학술대회 논문집
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• pp.80-80
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• 2011

본 논문은 윈도우에 디바이스 드라이버 형태로 동작하는 실시간 이식 커널을 제안한다. x86하드웨어에서 제공하는 Local APIC(Advanced Programmable Interrupt Controller)를 이용하여 윈도우와는 별도의 타이머를 제공하여, 독립적인 타이머 인터럽트를 통해 실시간성이 필요한 서비스가 정확한 주기로 동작하여 마감시한을 보장한다. 그리고 1553b 통신에서 IP470을 통해 오실로 스코프로 테스트하여 제안한 실시간 이식 커널이 실시간성을 보장함을 보인다.

• 대한인간공학회지
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• 제9권1호
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• pp.3-14
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• 1990

This article develops a cost-effective and accurate measurement system for heart best intervals. The system is composed of an analog to digital (A/D) converter, an IBM personal computer (an 8088 microprocessor, an 8253-5 timer, an 8259A interrupt controller, and memories) and assembler programs for controlling these hardware components. An exponential smoothing algorithm effectively reduced noise effects from A/D converted electrocardiogram (ECG) signals influenced by 60 Hz alternating current (AC). The system can collect 15000 heart beat intervals with an 1/5400 second unit.

• 한국정보처리학회:학술대회논문집
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• 한국정보처리학회 2010년도 추계학술발표대회
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• pp.1536-1539
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• 2010

본 논문은 ARM 기반 임베디드 시스템상에서 전가상화를 지원하는 가상 머신 모니터를 위한 가상 인터럽트 콘트롤러를 제안한다. 가상 인터럽트 콘트롤러는 실제 하드웨어 인터럽트 콘트롤러와 동일한 인터페이스를 가지며, 운영체제의 수정 없이 가상 인터럽트 콘트롤러를 하드웨어 인터럽트 콘트롤러와 동일한 방식으로 사용하는 환경을 제공한다. 본 논문에서는 가상 인터럽트 콘트롤러를 구현하고 성능을 측정하였다.

• 대한전기학회논문지
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• 제32권7호
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• pp.254-260
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• 1983

In this paper a basic design procedure for programmable instruments of IEEE-488 BUS system has been discussed by designing a specific programmable frequency counter with its hardware and software. The designed programmable frequency counter has a programmable range switch and a function of the programable number of measurements. It contains five basic functions(Talker. Listener, Source handshake, Accepter handshake and Controller) of a IEEE-488 BUS and the Device-Trigger as a supplimentary function. The hardware has been built along with 6800 MPU and 68488 GPIA, and its software has included initialization, interrupt handler, BI.GET,BO and controller routines, The designed system given in this paper has been successfuly tested via some experiments.

• 대한전기학회논문지:시스템및제어부문D
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• 제55권5호
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• pp.220-225
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• 2006

Arc Fault Current is an electric discharge which is occurred in two opposite electrode. In this paper, AFCI(arc fault circuit interrupter) is designed for the interruption of arc fault current which is occurred in the local electric network. This arc is one of the main causes of electric fire. Arc fault in electrical network has the characteristics of low current, high impedance and high frequency. Conventional arc fault circuit interrupter does not have the arc current interrupt function. Hence, Arc current controller is designed for the interruption of arc fault current which has the modified arc characteristics.