• Journal of the Institute of Electronics and Information Engineers
• /
• v.53 no.4
• /
• pp.48-58
• /
• 2016

This paper presents the high-throughput fully-parallel architecture for GF(64) (160,80) regular (2,4) non-binary LDPC (NB-LDPC) codes decoder based on the extended min sum algorithm. We exploit the NB-LDPC code that features a very low check node and variable node degree to reduce the complexity of decoder. This paper designs the fully-parallel architecture and allows the interleaving check node and variable node to increase the throughput of the decoder. We further improve the throughput by the proposed early sorting to reduce the latency of the check node operation. The proposed decoder has the latency of 37 cycles in the one decoding iteration and achieves a high throughput of 1402Mbps at 625MHz.

• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.48 no.9
• /
• pp.10-16
• /
• 2011

Interleaving is applied to prevent from exceeding the error-correction capability of channel code. At the receiver, burst errors are converted into random errors after deinterleaving, so the error-correction capability of channel code is not exceeded. However, when a receiver does not have any information on parameters used at an interleaver, interleaving can be seen as an encryption with some pattern. In this case, deinterleaving becomes complicated. In the field of blind deinterleaving, there have recently been a number of researches using linearity of linear block code. In spite of those researches, since the linearity is not applicable to a convolutional code, it is difficult to estimate parameters as in a linear block code. In this paper, we propose a method of blind block deinterleaving using convolutional code reconstruction method.

• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.48 no.4
• /
• pp.15-23
• /
• 2011

An interleaver rearranges a channel-encoded data in the symbol unit to spread burst errors occurred in channels into random errors. Thus, the interleaving process makes it difficult for a receiver, who does not have information of the interleaver parameters used in the transmitter, to de-interleave an unknown interleaved signal. Recently, various researches on the reconstruction of an unknown interleaved signal have been studied in many places of literature by estimating the interleaver parameters. They, however, have been mainly focused on the estimation of the block interleaver parameters required to reconstruct the de-interleaver. In this paper, as an extension of the previous researches, we estimate the convolutional interleaver parameters, e.g., the number of shift registers, a shift register depth, and a codeword length, required to de-interleave the unknown data stream, and propose the de-interleaving procedure by reconstructing the de-interleaver.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.45 no.12
• /
• pp.83-88
• /
• 2008

The QPP interleaver has been gaining attention since it provides contention-free interleaving functionality for high speed parallel turbo decoders. In this paper we first show that the quadratic term $f_2x^2%K$ of $f(x)=(f_1x+f_2x^2)%K$, the address generating function, is periodic. We then introduce a low-power address generator which utilizes this periodic characteristic. This generator follows the conventional method to generate the interleaving addresses and also to save the quadratic term values during the first half of the first period. The saved values are then reused for generating further interleaved addresses, resulting in reduced number of logical operations. Power consumption is reduced by 27.38% in the design with fixed-K and 5.54% in the design with unfixed-K on average for various values of K, when compared with the traditional designs.

• Journal of Korea Multimedia Society
• /
• v.5 no.5
• /
• pp.477-487
• /
• 2002

In a VOD system, it is desirable to provide the user with interactive VCR functions such as fast-forward and fast-backward. Typically, these functions can be implemented using the segment interleaving technique in disk away based VOD servers. But the segment interleaving nay not ensure QoS of users because of the concentrated load within some disks. In this paper, we propose an efficient load balancing technique for evenly distributing the retrieval requests across the disks. The proposed technique maintains an access counter in each disk, which has the number of disk accesses. The fast-forward/backward can be achieved by choosing a segment to be accessed from the disk with the minimum number among the access counters. We conduct simulation experiments and then show that our proposed technique outperforms the previous ones.

• The KIPS Transactions:PartC
• /
• v.10C no.1
• /
• pp.77-86
• /
• 2003

This paper describes the new method for Internet multicast routing protocols using MPLS (Multiprotocol Label Switching) networks. Internet multicast routing protocols are divided into three categories in terms if tree types and tree characteristics : a shortest path tree a shared tree and hybrid tree types. MPLS should support various multicast mechanisms because of extremely different IP multicast architectures, such as uni-/bi-directional link, Flooding/prune tree maintenance mechanism. the existence of different tree types with the same group, etc. There are so many problems over MPLS multicast that the solutions can't be easily figured out. In this Paper, we make a few assumptions on which the solutions of IP multicast routing protocols over MPLS networks are given. A broadcasting label is defined for the shortest path tree types. Cell interleaving problems of the shared tree types is solved by using block-based transmission mechanism. Finally, the existing hybrid-type multicast routing protocol is reasonably modified Shortest Path tree type to support MPLS multicast. It has been shown that these modifications give better performance (transmission delay) than the orignal method.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.14 no.4
• /
• pp.315-322
• /
• 2009

In the conventional boost converter, the actual duty cycle is limited as the output voltage increases due to increased voltage and current stress of the switch and diode and voltage surge caused by diode reverse recovery. In this paper a new non-isolated boost converter suitable for high gain applications is proposed. The proposed converter has voltage gain of around 6 when the duty cycle is 0.5. Since ZVS is achieved under CCM, the proposed converter has wide ZVS range. Also, voltage ratings of switch and diode are the same as one third of output voltage, and ratings of input and output passive components are reduced due to the interleaving. In addition voltage surge caused by diode reverse recovery is negligible due to ZCS turn-off of diodes. Operating principle of the proposed converter is described and validated through theoretical analysis, simulation and experiment.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.41 no.5
• /
• pp.504-511
• /
• 2016

In this paper, MIMO system based on turbo equalization techniques which LDPC codes were outer code and space time trellis codes (STTC) were employed as an inner code are studied. LDPC decoder and STTC decoder are connected through the interleaving and de-interleaving that updates each other's information repeatedly. In conventional turbo equalization of MIMO system, BCJR decoder which decodes STTC coded bits required two-bit wise decoding processing. Therefore duo-binary turbo codes are optimal for MIMO system combined with STTC codes. However a LDPC decoder requires bit unit processing, because LDPC codes can't be applied to these system. Therefore this paper proposed turbo equalization for MIMO system based on LDPC codes combined with STTC codes. By the simulation results, we confirmed performance of proposed turbo equalization model was improved about 0.6dB than that of conventional LDPC codes.

• The Journal of the Acoustical Society of Korea
• /
• v.24 no.4
• /
• pp.202-209
• /
• 2005

The rapid development of digital media and communication network urgently brings about the need of data certification technology to protect IPR (Intellectual property right). This paper proposed a new watermarking method for embedding owner's audio signal. Because this method uses an audio signal as a watermark to be embedded, it is very useful to claim the ownership aurally. And it has the advantage of restoring audio signal modified and especially removed by image removing attacks by applying our LBX(Linear Bit-expansion) interleaving. Three basic stages of our watermarking include: 1) Encode . analogue owner's audio signal by PCM and create new digital audio watermark, 2) Interleave an audio watermark by our LBX; and 3) Embed the interleaved audio watermark in the low frequency band on DTn (Discrete Haar Wavelet Transform) of image. The experimental results prove that this method is resistant to lossy JPEG compression as standard image compression and especially to cropping and rotation which remove a part of Image.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.35 no.6B
• /
• pp.948-953
• /
• 2010

In this paper, we propose multi-bit soft error detection method which can use an instruction cache of superscalar CPU architecture. Proposed method is applied to high-speed static RAM for instruction cache. Using 1D parity and interleaving, it has less memory overhead and detects more multi-bit errors comparing with other methods. It only detects occurrence of soft errors in static RAM. Error correction is treated like a cache miss situation. When soft errors are occurred, it is detected by 1D parity. Instruction cache just fetch the words from lower-level memory to correct errors. This method can detect multi-bit errors in maximum 4$\times$4 window.